Blackfin arch: dma add some API and cleanup bf54x DMA definition

Signed-off-by: Bryan Wu <bryan.wu@analog.com>
This commit is contained in:
Bryan Wu 2007-10-22 00:02:14 +08:00
parent 780431e397
commit 452af71f36
6 changed files with 34 additions and 6 deletions

View File

@ -420,6 +420,32 @@ unsigned short get_dma_curr_ycount(unsigned int channel)
}
EXPORT_SYMBOL(get_dma_curr_ycount);
unsigned long get_dma_next_desc_ptr(unsigned int channel)
{
BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
&& channel < MAX_BLACKFIN_DMA_CHANNEL));
return dma_ch[channel].regs->next_desc_ptr;
}
EXPORT_SYMBOL(get_dma_next_desc_ptr);
unsigned long get_dma_curr_desc_ptr(unsigned int channel)
{
BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
&& channel < MAX_BLACKFIN_DMA_CHANNEL));
return dma_ch[channel].regs->curr_desc_ptr;
}
unsigned long get_dma_curr_addr(unsigned int channel)
{
BUG_ON(!(dma_ch[channel].chan_status != DMA_CHANNEL_FREE
&& channel < MAX_BLACKFIN_DMA_CHANNEL));
return dma_ch[channel].regs->curr_addr_ptr;
}
EXPORT_SYMBOL(get_dma_curr_addr);
static void *__dma_memcpy(void *dest, const void *src, size_t size)
{
int direction; /* 1 - address decrease, 0 - address increase */

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@ -64,6 +64,7 @@
(struct dma_register *) MDMA_D3_NEXT_DESC_PTR,
(struct dma_register *) MDMA_S3_NEXT_DESC_PTR,
};
EXPORT_SYMBOL(base_addr);
int channel2irq(unsigned int channel)
{

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@ -109,9 +109,7 @@ struct dma_register {
unsigned long curr_desc_ptr; /* DMA Current Descriptor Pointer
register */
unsigned short curr_addr_ptr_lo; /* DMA Current Address Pointer
register */
unsigned short curr_addr_ptr_hi; /* DMA Current Address Pointer
unsigned long curr_addr_ptr; /* DMA Current Address Pointer
register */
unsigned short irq_status; /* DMA irq status register */
unsigned short dummy6;
@ -166,6 +164,9 @@ void set_dma_curr_addr(unsigned int channel, unsigned long addr);
unsigned short get_dma_curr_irqstat(unsigned int channel);
unsigned short get_dma_curr_xcount(unsigned int channel);
unsigned short get_dma_curr_ycount(unsigned int channel);
unsigned long get_dma_next_desc_ptr(unsigned int channel);
unsigned long get_dma_curr_desc_ptr(unsigned int channel);
unsigned long get_dma_curr_addr(unsigned int channel);
/* set large DMA mode descriptor */
void set_dma_sg(unsigned int channel, struct dmasg *sg, int nr_sg);

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@ -1178,7 +1178,7 @@
/* Bit masks for HOST_STATUS */
#define READY 0x1 /* DMA Ready */
#define DMA_READY 0x1 /* DMA Ready */
#define FIFOFULL 0x2 /* FIFO Full */
#define FIFOEMPTY 0x4 /* FIFO Empty */
#define DMA_COMPLETE 0x8 /* DMA Complete */

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@ -3303,7 +3303,7 @@
#define MFD 0xf000 /* Multi channel Frame Delay */
#define FSDR 0x80 /* Frame Sync to Data Relationship */
#define MCMEM 0x10 /* Multi channel Frame Mode Enable */
#define MCMEN 0x10 /* Multi channel Frame Mode Enable */
#define MCDRXPE 0x8 /* Multi channel DMA Receive Packing */
#define MCDTXPE 0x4 /* Multi channel DMA Transmit Packing */
#define MCCRM 0x3 /* 2X Clock Recovery Mode */

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@ -70,5 +70,5 @@
#define MAX_BLACKFIN_DMA_CHANNEL 32
extern int channel2irq(unsigned int channel);
extern struct dma_register *base_addr[];
extern struct dma_register *base_addr[MAX_BLACKFIN_DMA_CHANNEL];
#endif