mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-23 09:19:51 +00:00
ixgbe: DCB, X540 devices do not respond to pause frames
DCB enabled X540 devices are not responding to pause frames due to a missing register set that was added for these devices that did not exist in other devices. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
parent
e09ad236fc
commit
45a5f720fe
2 changed files with 9 additions and 2 deletions
|
@ -301,12 +301,17 @@ s32 ixgbe_dcb_config_pfc_82599(struct ixgbe_hw *hw, u8 pfc_en)
|
|||
IXGBE_WRITE_REG(hw, IXGBE_FCCFG, reg);
|
||||
/*
|
||||
* Enable Receive PFC
|
||||
* We will always honor XOFF frames we receive when
|
||||
* we are in PFC mode.
|
||||
* 82599 will always honor XOFF frames we receive when
|
||||
* we are in PFC mode however X540 only honors enabled
|
||||
* traffic classes.
|
||||
*/
|
||||
reg = IXGBE_READ_REG(hw, IXGBE_MFLCN);
|
||||
reg &= ~IXGBE_MFLCN_RFCE;
|
||||
reg |= IXGBE_MFLCN_RPFCE | IXGBE_MFLCN_DPF;
|
||||
|
||||
if (hw->mac.type == ixgbe_mac_X540)
|
||||
reg |= pfc_en << IXGBE_MFLCN_RPFCE_SHIFT;
|
||||
|
||||
IXGBE_WRITE_REG(hw, IXGBE_MFLCN, reg);
|
||||
|
||||
} else {
|
||||
|
|
|
@ -1728,6 +1728,8 @@
|
|||
#define IXGBE_MFLCN_RPFCE 0x00000004 /* Receive Priority FC Enable */
|
||||
#define IXGBE_MFLCN_RFCE 0x00000008 /* Receive FC Enable */
|
||||
|
||||
#define IXGBE_MFLCN_RPFCE_SHIFT 4
|
||||
|
||||
/* Multiple Receive Queue Control */
|
||||
#define IXGBE_MRQC_RSSEN 0x00000001 /* RSS Enable */
|
||||
#define IXGBE_MRQC_MRQE_MASK 0xF /* Bits 3:0 */
|
||||
|
|
Loading…
Reference in a new issue