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gpio fixes for v5.10-rc3
- fix missing conversion to gpiolib irqchip in gpio-dwapb - fix bank properties for ast2600 variant in gpio-aspeed - make sysfs work again when the character device is disabled - fix interrupt handling in gpio-pcie-idio-24 -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAl+lXTgACgkQEacuoBRx 13IEOA/+LTZNQJIUjWNk/xd3OQL5n2VMRbPOcnz6tkC/mAO7ZvPWuYlTR2qXPA7V vxNea9vczcjl5Qjda7HjyPfnds+31XTw/QLIUwMOVgQatV4fzZK/0fGrubkWftLM h+MJoIrm76+b2qJ8ax6z7ks8OnDgM24vJE2G5fBrgexl/bCfpzlFriv4bBRWQOiD sccJZM6yHifL+ObK30qcqI0s57fyZEOYTv5LnMUKyTDn7CmTXIefNGV1bN3LWnOA +/g7YuE8eedumMCegnrQbysnvVum1aQADnMV0krMs/+ykg32aWo4vFw2KbscVruc lB+s54+Gy3pBoSIRQA18/17L2mjyKmCGIWbQecQImCLU8kYfmdRqlN+HDof91oIa QaeoEvsZlXQ0pmEiGegEFNF9dNFldoY0OMQ7X7Bm3tVUshV0V7lKz5YUNJ6W/0PB ksxEdk3/doMfyJxAOHae0vvb8iK87T2pEEpqr4VhoewCe7E0D4L07P5WSkokn+1X OYFkdD3lAiXeY4AF7j5kM57OK525DmyO5ANqXAJSyjqJBtze8fIYDQ+yd5LugJO0 yUExb5bKPvMmN7g70btq53EaS7sSq7EbwRM5hC64B85lmjAh75mkBZDgsNOKOeD6 TsI+v8XsN7m/BrCSRBN1WrpwdMkt1c+1tEqGv9jJFzwYuIp5CTo= =dR2J -----END PGP SIGNATURE----- Merge tag 'gpio-fixes-for-v5.10-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux into fixes gpio fixes for v5.10-rc3 - fix missing conversion to gpiolib irqchip in gpio-dwapb - fix bank properties for ast2600 variant in gpio-aspeed - make sysfs work again when the character device is disabled - fix interrupt handling in gpio-pcie-idio-24
This commit is contained in:
Linus Walleij
commit
45fe0b539b
5 changed files with 74 additions and 26 deletions
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@ -1114,6 +1114,7 @@ static const struct aspeed_gpio_config ast2500_config =
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static const struct aspeed_bank_props ast2600_bank_props[] = {
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/* input output */
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{4, 0xffffffff, 0x00ffffff}, /* Q/R/S/T */
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{5, 0xffffffff, 0xffffff00}, /* U/V/W/X */
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{6, 0x0000ffff, 0x0000ffff}, /* Y/Z */
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{ },
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@ -343,8 +343,8 @@ static int dwapb_irq_set_type(struct irq_data *d, u32 type)
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#ifdef CONFIG_PM_SLEEP
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static int dwapb_irq_set_wake(struct irq_data *d, unsigned int enable)
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{
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struct irq_chip_generic *igc = irq_data_get_irq_chip_data(d);
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struct dwapb_gpio *gpio = igc->private;
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struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
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struct dwapb_gpio *gpio = to_dwapb_gpio(gc);
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struct dwapb_context *ctx = gpio->ports[0].ctx;
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irq_hw_number_t bit = irqd_to_hwirq(d);
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@ -28,6 +28,47 @@
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#include <linux/spinlock.h>
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#include <linux/types.h>
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/*
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* PLX PEX8311 PCI LCS_INTCSR Interrupt Control/Status
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*
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* Bit: Description
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* 0: Enable Interrupt Sources (Bit 0)
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* 1: Enable Interrupt Sources (Bit 1)
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* 2: Generate Internal PCI Bus Internal SERR# Interrupt
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* 3: Mailbox Interrupt Enable
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* 4: Power Management Interrupt Enable
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* 5: Power Management Interrupt
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* 6: Slave Read Local Data Parity Check Error Enable
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* 7: Slave Read Local Data Parity Check Error Status
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* 8: Internal PCI Wire Interrupt Enable
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* 9: PCI Express Doorbell Interrupt Enable
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* 10: PCI Abort Interrupt Enable
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* 11: Local Interrupt Input Enable
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* 12: Retry Abort Enable
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* 13: PCI Express Doorbell Interrupt Active
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* 14: PCI Abort Interrupt Active
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* 15: Local Interrupt Input Active
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* 16: Local Interrupt Output Enable
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* 17: Local Doorbell Interrupt Enable
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* 18: DMA Channel 0 Interrupt Enable
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* 19: DMA Channel 1 Interrupt Enable
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* 20: Local Doorbell Interrupt Active
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* 21: DMA Channel 0 Interrupt Active
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* 22: DMA Channel 1 Interrupt Active
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* 23: Built-In Self-Test (BIST) Interrupt Active
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* 24: Direct Master was the Bus Master during a Master or Target Abort
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* 25: DMA Channel 0 was the Bus Master during a Master or Target Abort
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* 26: DMA Channel 1 was the Bus Master during a Master or Target Abort
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* 27: Target Abort after internal 256 consecutive Master Retrys
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* 28: PCI Bus wrote data to LCS_MBOX0
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* 29: PCI Bus wrote data to LCS_MBOX1
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* 30: PCI Bus wrote data to LCS_MBOX2
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* 31: PCI Bus wrote data to LCS_MBOX3
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*/
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#define PLX_PEX8311_PCI_LCS_INTCSR 0x68
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#define INTCSR_INTERNAL_PCI_WIRE BIT(8)
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#define INTCSR_LOCAL_INPUT BIT(11)
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/**
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* struct idio_24_gpio_reg - GPIO device registers structure
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* @out0_7: Read: FET Outputs 0-7
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@ -92,6 +133,7 @@ struct idio_24_gpio_reg {
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struct idio_24_gpio {
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struct gpio_chip chip;
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raw_spinlock_t lock;
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__u8 __iomem *plx;
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struct idio_24_gpio_reg __iomem *reg;
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unsigned long irq_mask;
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};
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@ -334,13 +376,13 @@ static void idio_24_irq_mask(struct irq_data *data)
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unsigned long flags;
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const unsigned long bit_offset = irqd_to_hwirq(data) - 24;
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unsigned char new_irq_mask;
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const unsigned long bank_offset = bit_offset/8 * 8;
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const unsigned long bank_offset = bit_offset / 8;
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unsigned char cos_enable_state;
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raw_spin_lock_irqsave(&idio24gpio->lock, flags);
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idio24gpio->irq_mask &= BIT(bit_offset);
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new_irq_mask = idio24gpio->irq_mask >> bank_offset;
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idio24gpio->irq_mask &= ~BIT(bit_offset);
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new_irq_mask = idio24gpio->irq_mask >> bank_offset * 8;
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if (!new_irq_mask) {
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cos_enable_state = ioread8(&idio24gpio->reg->cos_enable);
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@ -363,12 +405,12 @@ static void idio_24_irq_unmask(struct irq_data *data)
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unsigned long flags;
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unsigned char prev_irq_mask;
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const unsigned long bit_offset = irqd_to_hwirq(data) - 24;
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const unsigned long bank_offset = bit_offset/8 * 8;
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const unsigned long bank_offset = bit_offset / 8;
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unsigned char cos_enable_state;
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raw_spin_lock_irqsave(&idio24gpio->lock, flags);
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prev_irq_mask = idio24gpio->irq_mask >> bank_offset;
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prev_irq_mask = idio24gpio->irq_mask >> bank_offset * 8;
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idio24gpio->irq_mask |= BIT(bit_offset);
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if (!prev_irq_mask) {
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@ -455,6 +497,7 @@ static int idio_24_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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struct device *const dev = &pdev->dev;
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struct idio_24_gpio *idio24gpio;
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int err;
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const size_t pci_plx_bar_index = 1;
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const size_t pci_bar_index = 2;
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const char *const name = pci_name(pdev);
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struct gpio_irq_chip *girq;
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@ -469,12 +512,13 @@ static int idio_24_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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return err;
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}
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err = pcim_iomap_regions(pdev, BIT(pci_bar_index), name);
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err = pcim_iomap_regions(pdev, BIT(pci_plx_bar_index) | BIT(pci_bar_index), name);
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if (err) {
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dev_err(dev, "Unable to map PCI I/O addresses (%d)\n", err);
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return err;
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}
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idio24gpio->plx = pcim_iomap_table(pdev)[pci_plx_bar_index];
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idio24gpio->reg = pcim_iomap_table(pdev)[pci_bar_index];
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idio24gpio->chip.label = name;
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@ -504,6 +548,12 @@ static int idio_24_probe(struct pci_dev *pdev, const struct pci_device_id *id)
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/* Software board reset */
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iowrite8(0, &idio24gpio->reg->soft_reset);
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/*
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* enable PLX PEX8311 internal PCI wire interrupt and local interrupt
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* input
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*/
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iowrite8((INTCSR_INTERNAL_PCI_WIRE | INTCSR_LOCAL_INPUT) >> 8,
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idio24gpio->plx + PLX_PEX8311_PCI_LCS_INTCSR + 1);
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err = devm_gpiochip_add_data(dev, &idio24gpio->chip, idio24gpio);
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if (err) {
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@ -7,22 +7,7 @@
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struct gpio_device;
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#ifdef CONFIG_GPIO_CDEV
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int gpiolib_cdev_register(struct gpio_device *gdev, dev_t devt);
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void gpiolib_cdev_unregister(struct gpio_device *gdev);
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#else
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static inline int gpiolib_cdev_register(struct gpio_device *gdev, dev_t devt)
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{
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return 0;
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}
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static inline void gpiolib_cdev_unregister(struct gpio_device *gdev)
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{
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}
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#endif /* CONFIG_GPIO_CDEV */
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#endif /* GPIOLIB_CDEV_H */
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@ -480,11 +480,23 @@ static void gpiodevice_release(struct device *dev)
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kfree(gdev);
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}
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#ifdef CONFIG_GPIO_CDEV
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#define gcdev_register(gdev, devt) gpiolib_cdev_register((gdev), (devt))
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#define gcdev_unregister(gdev) gpiolib_cdev_unregister((gdev))
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#else
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/*
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* gpiolib_cdev_register() indirectly calls device_add(), which is still
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* required even when cdev is not selected.
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*/
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#define gcdev_register(gdev, devt) device_add(&(gdev)->dev)
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#define gcdev_unregister(gdev) device_del(&(gdev)->dev)
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#endif
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static int gpiochip_setup_dev(struct gpio_device *gdev)
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{
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int ret;
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ret = gpiolib_cdev_register(gdev, gpio_devt);
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ret = gcdev_register(gdev, gpio_devt);
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if (ret)
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return ret;
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@ -500,7 +512,7 @@ static int gpiochip_setup_dev(struct gpio_device *gdev)
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return 0;
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err_remove_device:
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gpiolib_cdev_unregister(gdev);
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gcdev_unregister(gdev);
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return ret;
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}
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@ -825,7 +837,7 @@ void gpiochip_remove(struct gpio_chip *gc)
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* be removed, else it will be dangling until the last user is
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* gone.
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*/
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gpiolib_cdev_unregister(gdev);
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gcdev_unregister(gdev);
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put_device(&gdev->dev);
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}
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EXPORT_SYMBOL_GPL(gpiochip_remove);
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