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pinctrl: single: Use generic parser and #pinctrl-cells for pinctrl-single,pins
We can now use generic parser. To support the legacy binding without #pinctrl-cells, add pcs_quirk_missing_pinctrl_cells() and warn about missing #pinctrl-cells. Let's also update the documentation for struct pcs_soc_data while at it as that seems to be out of date. Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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42124bc598
commit
4622215fb1
1 changed files with 93 additions and 18 deletions
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@ -31,10 +31,10 @@
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#include <linux/platform_data/pinctrl-single.h>
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#include "core.h"
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#include "devicetree.h"
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#include "pinconf.h"
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#define DRIVER_NAME "pinctrl-single"
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#define PCS_MUX_PINS_NAME "pinctrl-single,pins"
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#define PCS_MUX_BITS_NAME "pinctrl-single,bits"
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#define PCS_OFF_DISABLED ~0U
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@ -162,8 +162,11 @@ struct pcs_soc_data {
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* @base: virtual address of the controller
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* @size: size of the ioremapped area
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* @dev: device entry
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* @np: device tree node
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* @pctl: pin controller device
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* @flags: mask of PCS_FEAT_xxx values
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* @missing_nr_pinctrl_cells: for legacy binding, may go away
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* @socdata: soc specific data
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* @lock: spinlock for register access
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* @mutex: mutex protecting the lists
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* @width: bits per mux register
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@ -171,7 +174,8 @@ struct pcs_soc_data {
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* @fshift: function register shift
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* @foff: value to turn mux off
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* @fmax: max number of functions in fmask
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* @bits_per_pin:number of bits per pin
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* @bits_per_mux: number of bits per mux
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* @bits_per_pin: number of bits per pin
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* @pins: physical pins on the SoC
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* @pgtree: pingroup index radix tree
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* @ftree: function index radix tree
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@ -192,11 +196,13 @@ struct pcs_device {
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void __iomem *base;
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unsigned size;
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struct device *dev;
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struct device_node *np;
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struct pinctrl_dev *pctl;
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unsigned flags;
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#define PCS_QUIRK_SHARED_IRQ (1 << 2)
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#define PCS_FEAT_IRQ (1 << 1)
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#define PCS_FEAT_PINCONF (1 << 0)
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struct property *missing_nr_pinctrl_cells;
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struct pcs_soc_data socdata;
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raw_spinlock_t lock;
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struct mutex mutex;
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@ -1122,20 +1128,14 @@ static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs,
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unsigned *num_maps,
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const char **pgnames)
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{
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const char *name = "pinctrl-single,pins";
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struct pcs_func_vals *vals;
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const __be32 *mux;
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int size, rows, *pins, index = 0, found = 0, res = -ENOMEM;
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int rows, *pins, found = 0, res = -ENOMEM, i;
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struct pcs_function *function;
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mux = of_get_property(np, PCS_MUX_PINS_NAME, &size);
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if ((!mux) || (size < sizeof(*mux) * 2)) {
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dev_err(pcs->dev, "bad data for mux %s\n",
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np->name);
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return -EINVAL;
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}
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size /= sizeof(*mux); /* Number of elements in array */
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rows = size / 2;
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rows = pinctrl_count_index_with_args(np, name);
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if (rows == -EINVAL)
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return rows;
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vals = devm_kzalloc(pcs->dev, sizeof(*vals) * rows, GFP_KERNEL);
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if (!vals)
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@ -1145,14 +1145,28 @@ static int pcs_parse_one_pinctrl_entry(struct pcs_device *pcs,
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if (!pins)
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goto free_vals;
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while (index < size) {
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unsigned offset, val;
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for (i = 0; i < rows; i++) {
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struct of_phandle_args pinctrl_spec;
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unsigned int offset;
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int pin;
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offset = be32_to_cpup(mux + index++);
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val = be32_to_cpup(mux + index++);
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res = pinctrl_parse_index_with_args(np, name, i, &pinctrl_spec);
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if (res)
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return res;
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if (pinctrl_spec.args_count < 2) {
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dev_err(pcs->dev, "invalid args_count for spec: %i\n",
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pinctrl_spec.args_count);
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break;
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}
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/* Index plus one value cell */
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offset = pinctrl_spec.args[0];
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vals[found].reg = pcs->base + offset;
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vals[found].val = val;
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vals[found].val = pinctrl_spec.args[1];
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dev_dbg(pcs->dev, "%s index: 0x%x value: 0x%x\n",
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pinctrl_spec.np->name, offset, pinctrl_spec.args[1]);
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pin = pcs_get_pin_by_offset(pcs, offset);
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if (pin < 0) {
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@ -1470,6 +1484,10 @@ static void pcs_free_resources(struct pcs_device *pcs)
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pinctrl_unregister(pcs->pctl);
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pcs_free_funcs(pcs);
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pcs_free_pingroups(pcs);
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#if IS_BUILTIN(CONFIG_PINCTRL_SINGLE)
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if (pcs->missing_nr_pinctrl_cells)
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of_remove_property(pcs->np, pcs->missing_nr_pinctrl_cells);
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#endif
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}
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static const struct of_device_id pcs_of_match[];
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@ -1787,6 +1805,55 @@ static int pinctrl_single_resume(struct platform_device *pdev)
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}
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#endif
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/**
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* pcs_quirk_missing_pinctrl_cells - handle legacy binding
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* @pcs: pinctrl driver instance
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* @np: device tree node
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* @cells: number of cells
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*
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* Handle legacy binding with no #pinctrl-cells. This should be
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* always two pinctrl-single,bit-per-mux and one for others.
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* At some point we may want to consider removing this.
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*/
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static int pcs_quirk_missing_pinctrl_cells(struct pcs_device *pcs,
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struct device_node *np,
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int cells)
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{
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struct property *p;
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const char *name = "#pinctrl-cells";
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int error;
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u32 val;
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error = of_property_read_u32(np, name, &val);
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if (!error)
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return 0;
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dev_warn(pcs->dev, "please update dts to use %s = <%i>\n",
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name, cells);
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p = devm_kzalloc(pcs->dev, sizeof(*p), GFP_KERNEL);
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if (!p)
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return -ENOMEM;
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p->length = sizeof(__be32);
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p->value = devm_kzalloc(pcs->dev, sizeof(__be32), GFP_KERNEL);
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if (!p->value)
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return -ENOMEM;
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*(__be32 *)p->value = cpu_to_be32(cells);
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p->name = devm_kstrdup(pcs->dev, name, GFP_KERNEL);
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if (!p->name)
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return -ENOMEM;
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pcs->missing_nr_pinctrl_cells = p;
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#if IS_BUILTIN(CONFIG_PINCTRL_SINGLE)
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error = of_add_property(np, pcs->missing_nr_pinctrl_cells);
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#endif
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return error;
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}
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static int pcs_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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@ -1807,6 +1874,7 @@ static int pcs_probe(struct platform_device *pdev)
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return -ENOMEM;
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}
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pcs->dev = &pdev->dev;
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pcs->np = np;
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raw_spin_lock_init(&pcs->lock);
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mutex_init(&pcs->mutex);
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INIT_LIST_HEAD(&pcs->pingroups);
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@ -1843,6 +1911,13 @@ static int pcs_probe(struct platform_device *pdev)
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pcs->bits_per_mux = of_property_read_bool(np,
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"pinctrl-single,bit-per-mux");
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ret = pcs_quirk_missing_pinctrl_cells(pcs, np,
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pcs->bits_per_mux ? 2 : 1);
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if (ret) {
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dev_err(&pdev->dev, "unable to patch #pinctrl-cells\n");
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return ret;
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}
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res) {
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