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x86/cpu: Add Xeon Icelake-D to list of CPUs that support PPIN
commite464121f2d
upstream. Missed adding the Icelake-D CPU to the list. It uses the same MSRs to control and read the inventory number as all the other models. Fixes:dc6b025de9
("x86/mce: Add Xeon Icelake to list of CPUs that support PPIN") Reported-by: Ailin Xu <ailin.xu@intel.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Cc: <stable@vger.kernel.org> Link: https://lore.kernel.org/r/20220121174743.1875294-2-tony.luck@intel.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -486,6 +486,7 @@ static void intel_ppin_init(struct cpuinfo_x86 *c)
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case INTEL_FAM6_BROADWELL_X:
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case INTEL_FAM6_SKYLAKE_X:
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case INTEL_FAM6_ICELAKE_X:
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case INTEL_FAM6_ICELAKE_D:
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case INTEL_FAM6_SAPPHIRERAPIDS_X:
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case INTEL_FAM6_XEON_PHI_KNL:
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case INTEL_FAM6_XEON_PHI_KNM:
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