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phy: freescale: imx8mq-usb: add support for imx8mp usb phy
Add initial support for imx8mp usb phy support, imx8mp usb has a silimar phy as imx8mq, which has some different customizations on clock and low power design when SoC integration. Signed-off-by: Li Jun <jun.li@nxp.com> Link: https://lore.kernel.org/r/1598276014-2377-2-git-send-email-jun.li@nxp.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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e8bd1cd922
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1 changed files with 70 additions and 7 deletions
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@ -1,15 +1,20 @@
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// SPDX-License-Identifier: GPL-2.0+
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// SPDX-License-Identifier: GPL-2.0+
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/* Copyright (c) 2017 NXP. */
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/* Copyright (c) 2017 NXP. */
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/io.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/module.h>
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#include <linux/of_platform.h>
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#include <linux/phy/phy.h>
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#include <linux/phy/phy.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/regulator/consumer.h>
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#define PHY_CTRL0 0x0
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#define PHY_CTRL0 0x0
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#define PHY_CTRL0_REF_SSP_EN BIT(2)
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#define PHY_CTRL0_REF_SSP_EN BIT(2)
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#define PHY_CTRL0_FSEL_MASK GENMASK(10, 5)
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#define PHY_CTRL0_FSEL_24M 0x2a
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#define PHY_CTRL1 0x4
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#define PHY_CTRL1 0x4
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#define PHY_CTRL1_RESET BIT(0)
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#define PHY_CTRL1_RESET BIT(0)
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@ -20,6 +25,11 @@
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#define PHY_CTRL2 0x8
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#define PHY_CTRL2 0x8
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#define PHY_CTRL2_TXENABLEN0 BIT(8)
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#define PHY_CTRL2_TXENABLEN0 BIT(8)
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#define PHY_CTRL2_OTG_DISABLE BIT(9)
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#define PHY_CTRL6 0x18
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#define PHY_CTRL6_ALT_CLK_EN BIT(1)
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#define PHY_CTRL6_ALT_CLK_SEL BIT(0)
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struct imx8mq_usb_phy {
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struct imx8mq_usb_phy {
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struct phy *phy;
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struct phy *phy;
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@ -54,6 +64,44 @@ static int imx8mq_usb_phy_init(struct phy *phy)
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return 0;
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return 0;
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}
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}
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static int imx8mp_usb_phy_init(struct phy *phy)
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{
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struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
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u32 value;
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/* USB3.0 PHY signal fsel for 24M ref */
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value = readl(imx_phy->base + PHY_CTRL0);
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value &= ~PHY_CTRL0_FSEL_MASK;
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value |= FIELD_PREP(PHY_CTRL0_FSEL_MASK, PHY_CTRL0_FSEL_24M);
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writel(value, imx_phy->base + PHY_CTRL0);
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/* Disable alt_clk_en and use internal MPLL clocks */
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value = readl(imx_phy->base + PHY_CTRL6);
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value &= ~(PHY_CTRL6_ALT_CLK_SEL | PHY_CTRL6_ALT_CLK_EN);
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writel(value, imx_phy->base + PHY_CTRL6);
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value = readl(imx_phy->base + PHY_CTRL1);
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value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0);
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value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET;
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writel(value, imx_phy->base + PHY_CTRL1);
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value = readl(imx_phy->base + PHY_CTRL0);
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value |= PHY_CTRL0_REF_SSP_EN;
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writel(value, imx_phy->base + PHY_CTRL0);
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value = readl(imx_phy->base + PHY_CTRL2);
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value |= PHY_CTRL2_TXENABLEN0 | PHY_CTRL2_OTG_DISABLE;
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writel(value, imx_phy->base + PHY_CTRL2);
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udelay(10);
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value = readl(imx_phy->base + PHY_CTRL1);
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value &= ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET);
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writel(value, imx_phy->base + PHY_CTRL1);
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return 0;
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}
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static int imx8mq_phy_power_on(struct phy *phy)
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static int imx8mq_phy_power_on(struct phy *phy)
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{
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{
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struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
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struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
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@ -83,12 +131,29 @@ static struct phy_ops imx8mq_usb_phy_ops = {
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.owner = THIS_MODULE,
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.owner = THIS_MODULE,
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};
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};
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static struct phy_ops imx8mp_usb_phy_ops = {
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.init = imx8mp_usb_phy_init,
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.power_on = imx8mq_phy_power_on,
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.power_off = imx8mq_phy_power_off,
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.owner = THIS_MODULE,
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};
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static const struct of_device_id imx8mq_usb_phy_of_match[] = {
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{.compatible = "fsl,imx8mq-usb-phy",
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.data = &imx8mq_usb_phy_ops,},
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{.compatible = "fsl,imx8mp-usb-phy",
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.data = &imx8mp_usb_phy_ops,},
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{ }
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};
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MODULE_DEVICE_TABLE(of, imx8mq_usb_phy_of_match);
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static int imx8mq_usb_phy_probe(struct platform_device *pdev)
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static int imx8mq_usb_phy_probe(struct platform_device *pdev)
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{
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{
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struct phy_provider *phy_provider;
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struct phy_provider *phy_provider;
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struct device *dev = &pdev->dev;
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struct device *dev = &pdev->dev;
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struct imx8mq_usb_phy *imx_phy;
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struct imx8mq_usb_phy *imx_phy;
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struct resource *res;
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struct resource *res;
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const struct phy_ops *phy_ops;
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imx_phy = devm_kzalloc(dev, sizeof(*imx_phy), GFP_KERNEL);
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imx_phy = devm_kzalloc(dev, sizeof(*imx_phy), GFP_KERNEL);
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if (!imx_phy)
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if (!imx_phy)
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@ -105,7 +170,11 @@ static int imx8mq_usb_phy_probe(struct platform_device *pdev)
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if (IS_ERR(imx_phy->base))
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if (IS_ERR(imx_phy->base))
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return PTR_ERR(imx_phy->base);
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return PTR_ERR(imx_phy->base);
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imx_phy->phy = devm_phy_create(dev, NULL, &imx8mq_usb_phy_ops);
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phy_ops = of_device_get_match_data(dev);
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if (!phy_ops)
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return -EINVAL;
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imx_phy->phy = devm_phy_create(dev, NULL, phy_ops);
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if (IS_ERR(imx_phy->phy))
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if (IS_ERR(imx_phy->phy))
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return PTR_ERR(imx_phy->phy);
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return PTR_ERR(imx_phy->phy);
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@ -120,12 +189,6 @@ static int imx8mq_usb_phy_probe(struct platform_device *pdev)
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return PTR_ERR_OR_ZERO(phy_provider);
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return PTR_ERR_OR_ZERO(phy_provider);
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}
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}
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static const struct of_device_id imx8mq_usb_phy_of_match[] = {
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{.compatible = "fsl,imx8mq-usb-phy",},
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{ },
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};
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MODULE_DEVICE_TABLE(of, imx8mq_usb_phy_of_match);
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static struct platform_driver imx8mq_usb_phy_driver = {
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static struct platform_driver imx8mq_usb_phy_driver = {
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.probe = imx8mq_usb_phy_probe,
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.probe = imx8mq_usb_phy_probe,
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.driver = {
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.driver = {
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