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docs/arm64: cpu-feature-registers: Rewrite bitfields that don't follow [e, s]

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Commit "docs/arm64: cpu-feature-registers: Documents missing visible
fields" added bitfields following the convention [s, e]. However, the
documentation is following [s, e] and so does the Arm ARM.

Rewrite the bitfields to match the format [s, e].

Fixes: a8613e7070 ("docs/arm64: cpu-feature-registers: Documents missing visible fields")
Signed-off-by: Julien Grall <julien.grall@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This commit is contained in:
Julien Grall 2019-11-01 15:20:22 +00:00 committed by Catalin Marinas
parent a8613e7070
commit 478016c383
1 changed files with 2 additions and 2 deletions
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4
Documentation/arm64/cpu-feature-registers.rst
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@ -193,9 +193,9 @@ infrastructure:
+------------------------------+---------+---------+
| Name | bits | visible |
+------------------------------+---------+---------+
| SB | [36-39] | y |
| SB | [39-36] | y |
+------------------------------+---------+---------+
| FRINTTS | [32-35] | y |
| FRINTTS | [35-32] | y |
+------------------------------+---------+---------+
| GPI | [31-28] | y |
+------------------------------+---------+---------+