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drm/amdgpu: Increase PSP runtime TMR region size
Aldebaran uses more than 4M runtime TMR. The current hard coded 4M TMR is not big enough for Aldebaran. Increase it to 8M. v2: Only do 8M size for ALDEBARAN (Hawking) Signed-off-by: Oak Zeng <Oak.Zeng@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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2 changed files with 3 additions and 3 deletions
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@ -387,7 +387,7 @@ static int psp_tmr_init(struct psp_context *psp)
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* Note: this memory need be reserved till the driver
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* uninitializes.
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*/
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tmr_size = PSP_TMR_SIZE;
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tmr_size = PSP_TMR_SIZE(psp->adev);
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/* For ASICs support RLC autoload, psp will parse the toc
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* and calculate the total size of TMR needed */
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@ -403,7 +403,7 @@ static int psp_tmr_init(struct psp_context *psp)
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}
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pptr = amdgpu_sriov_vf(psp->adev) ? &tmr_buf : NULL;
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ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_SIZE,
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ret = amdgpu_bo_create_kernel(psp->adev, tmr_size, PSP_TMR_SIZE(psp->adev),
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AMDGPU_GEM_DOMAIN_VRAM,
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&psp->tmr_bo, &psp->tmr_mc_addr, pptr);
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@ -37,7 +37,7 @@
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#define PSP_XGMI_SHARED_MEM_SIZE 0x4000
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#define PSP_RAS_SHARED_MEM_SIZE 0x4000
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#define PSP_1_MEG 0x100000
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#define PSP_TMR_SIZE 0x400000
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#define PSP_TMR_SIZE(adev) ((adev)->asic_type == CHIP_ALDEBARAN ? 0x800000 : 0x400000)
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#define PSP_HDCP_SHARED_MEM_SIZE 0x4000
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#define PSP_DTM_SHARED_MEM_SIZE 0x4000
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#define PSP_RAP_SHARED_MEM_SIZE 0x4000
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