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Blackfin: add blackfin_invalidate_entire_icache for SMP systems
The KGDB code uses this when switching processors to make sure the icache is in a valid state. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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parent
2466ac6556
commit
47e9dedb72
6 changed files with 37 additions and 4 deletions
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@ -34,9 +34,13 @@
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#define L1_CACHE_SHIFT_MAX 5
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#if defined(CONFIG_SMP) && \
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!defined(CONFIG_BFIN_CACHE_COHERENT) && \
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defined(CONFIG_BFIN_DCACHE)
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#define __ARCH_SYNC_CORE_DCACHE
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!defined(CONFIG_BFIN_CACHE_COHERENT)
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# if defined(CONFIG_BFIN_ICACHE)
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# define __ARCH_SYNC_CORE_ICACHE
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# endif
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# if defined(CONFIG_BFIN_DCACHE)
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# define __ARCH_SYNC_CORE_DCACHE
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# endif
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#ifndef __ASSEMBLY__
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asmlinkage void __raw_smp_mark_barrier_asm(void);
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asmlinkage void __raw_smp_check_barrier_asm(void);
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@ -51,6 +55,7 @@ static inline void smp_check_barrier(void)
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}
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void resync_core_dcache(void);
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void resync_core_icache(void);
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#endif
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#endif
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@ -37,6 +37,7 @@ extern void blackfin_dcache_flush_range(unsigned long start_address, unsigned lo
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extern void blackfin_dcache_invalidate_range(unsigned long start_address, unsigned long end_address);
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extern void blackfin_dflush_page(void *page);
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extern void blackfin_invalidate_entire_dcache(void);
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extern void blackfin_invalidate_entire_icache(void);
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#define flush_dcache_mmap_lock(mapping) do { } while (0)
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#define flush_dcache_mmap_unlock(mapping) do { } while (0)
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@ -34,6 +34,7 @@ struct blackfin_cpudata {
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unsigned int dmemctl;
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unsigned long loops_per_jiffy;
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unsigned long dcache_invld_count;
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unsigned long icache_invld_count;
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};
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DECLARE_PER_CPU(struct blackfin_cpudata, cpu_data);
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@ -1181,6 +1181,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
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#ifdef __ARCH_SYNC_CORE_DCACHE
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seq_printf(m, "SMP Dcache Flushes\t: %lu\n\n", cpudata->dcache_invld_count);
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#endif
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#ifdef __ARCH_SYNC_CORE_ICACHE
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seq_printf(m, "SMP Icache Flushes\t: %lu\n\n", cpudata->icache_invld_count);
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#endif
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#ifdef CONFIG_BFIN_ICACHE_LOCK
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switch ((cpudata->imemctl >> 3) & WAYALL_L) {
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case WAY0_L:
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@ -16,9 +16,21 @@
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void blackfin_invalidate_entire_dcache(void)
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{
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u32 dmem = bfin_read_DMEM_CONTROL();
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SSYNC();
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bfin_write_DMEM_CONTROL(dmem & ~0xc);
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SSYNC();
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bfin_write_DMEM_CONTROL(dmem);
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SSYNC();
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}
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/* Invalidate the Entire Instruction cache by
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* clearing IMC bit
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*/
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void blackfin_invalidate_entire_icache(void)
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{
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u32 imem = bfin_read_IMEM_CONTROL();
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bfin_write_IMEM_CONTROL(imem & ~0x4);
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SSYNC();
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bfin_write_IMEM_CONTROL(imem);
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SSYNC();
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}
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@ -468,6 +468,17 @@ void smp_icache_flush_range_others(unsigned long start, unsigned long end)
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}
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EXPORT_SYMBOL_GPL(smp_icache_flush_range_others);
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#ifdef __ARCH_SYNC_CORE_ICACHE
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void resync_core_icache(void)
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{
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unsigned int cpu = get_cpu();
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blackfin_invalidate_entire_icache();
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++per_cpu(cpu_data, cpu).icache_invld_count;
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put_cpu();
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}
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EXPORT_SYMBOL(resync_core_icache);
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#endif
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#ifdef __ARCH_SYNC_CORE_DCACHE
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unsigned long barrier_mask __attribute__ ((__section__(".l2.bss")));
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