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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-21 00:10:09 +00:00
cirrusfb: various improvements
Various improvements to the code: - kill a structure with only one field: multiplexing and use the field directly - move the cirrusfb_ops structure down the file to kill forward declarations - move cirrusfb_init() to kill forward declaration - kill register loads done already in the init_vgachip() - kill assigments done by higher layer in the cirrusfb_pan_display() - do not overwrite line pitch bit in the CL_CRT1D register - kill btype variables if they were used only once or twice - add cpu_relax() in the busy waiting loop The fix to the CL_CRT1D register handling makess the 1024x768 32bpp mode work. Previously, only lower resolution modes have worked with 32bpp. Signed-off-by: Krzysztof Helt <krzysztof.h1@poczta.fm> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Krzysztof Helt
Linus Torvalds
parent
c4dec3962d
commit
48c329e906
1 changed files with 58 additions and 144 deletions
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@ -313,10 +313,6 @@ static const struct {
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};
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#endif /* CONFIG_ZORRO */
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struct cirrusfb_regs {
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int multiplexing;
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};
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#ifdef CIRRUSFB_DEBUG
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enum cirrusfb_dbg_reg_class {
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CRT,
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@ -331,7 +327,7 @@ struct cirrusfb_info {
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enum cirrus_board btype;
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unsigned char SFR; /* Shadow of special function register */
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struct cirrusfb_regs currentmode;
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int multiplexing;
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int blank_mode;
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u32 pseudo_palette[16];
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@ -345,43 +341,8 @@ static char *mode_option __devinitdata = "640x480@60";
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/**** BEGIN PROTOTYPES ******************************************************/
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/*--- Interface used by the world ------------------------------------------*/
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static int cirrusfb_init(void);
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#ifndef MODULE
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static int cirrusfb_setup(char *options);
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#endif
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static int cirrusfb_open(struct fb_info *info, int user);
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static int cirrusfb_release(struct fb_info *info, int user);
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static int cirrusfb_setcolreg(unsigned regno, unsigned red, unsigned green,
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unsigned blue, unsigned transp,
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struct fb_info *info);
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static int cirrusfb_check_var(struct fb_var_screeninfo *var,
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struct fb_info *info);
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static int cirrusfb_set_par(struct fb_info *info);
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static int cirrusfb_pan_display(struct fb_var_screeninfo *var,
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struct fb_info *info);
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static int cirrusfb_blank(int blank_mode, struct fb_info *info);
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static void cirrusfb_fillrect(struct fb_info *info,
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const struct fb_fillrect *region);
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static void cirrusfb_copyarea(struct fb_info *info,
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const struct fb_copyarea *area);
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static void cirrusfb_imageblit(struct fb_info *info,
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const struct fb_image *image);
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/* function table of the above functions */
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static struct fb_ops cirrusfb_ops = {
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.owner = THIS_MODULE,
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.fb_open = cirrusfb_open,
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.fb_release = cirrusfb_release,
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.fb_setcolreg = cirrusfb_setcolreg,
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.fb_check_var = cirrusfb_check_var,
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.fb_set_par = cirrusfb_set_par,
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.fb_pan_display = cirrusfb_pan_display,
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.fb_blank = cirrusfb_blank,
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.fb_fillrect = cirrusfb_fillrect,
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.fb_copyarea = cirrusfb_copyarea,
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.fb_imageblit = cirrusfb_imageblit,
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};
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/*--- Internal routines ----------------------------------------------------*/
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static void init_vgachip(struct fb_info *info);
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@ -587,7 +548,6 @@ static int cirrusfb_check_var(struct fb_var_screeninfo *var,
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}
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static int cirrusfb_decode_var(const struct fb_var_screeninfo *var,
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struct cirrusfb_regs *regs,
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struct fb_info *info)
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{
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long freq;
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@ -628,7 +588,7 @@ static int cirrusfb_decode_var(const struct fb_var_screeninfo *var,
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dev_dbg(info->device, "desired pixclock: %ld kHz\n", freq);
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maxclock = cirrusfb_board_info[cinfo->btype].maxclock[maxclockidx];
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regs->multiplexing = 0;
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cinfo->multiplexing = 0;
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/* If the frequency is greater than we can support, we might be able
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* to use multiplexing for the video mode */
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@ -636,7 +596,7 @@ static int cirrusfb_decode_var(const struct fb_var_screeninfo *var,
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switch (cinfo->btype) {
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case BT_ALPINE:
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case BT_GD5480:
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regs->multiplexing = 1;
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cinfo->multiplexing = 1;
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break;
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default:
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@ -691,7 +651,6 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
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{
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struct cirrusfb_info *cinfo = info->par;
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struct fb_var_screeninfo *var = &info->var;
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struct cirrusfb_regs regs;
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u8 __iomem *regbase = cinfo->regbase;
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unsigned char tmp;
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int err;
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@ -709,7 +668,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
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init_vgachip(info);
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err = cirrusfb_decode_var(var, ®s, info);
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err = cirrusfb_decode_var(var, info);
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if (err) {
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/* should never happen */
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dev_dbg(info->device, "mode change aborted. invalid var.\n");
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@ -753,7 +712,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
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vsyncend /= 2;
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vdispend /= 2;
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}
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if (regs.multiplexing) {
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if (cinfo->multiplexing) {
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htotal /= 2;
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hsyncstart /= 2;
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hsyncend /= 2;
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@ -964,7 +923,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
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case BT_ALPINE:
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case BT_GD5480:
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vga_wseq(regbase, CL_SEQR7,
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regs.multiplexing ?
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cinfo->multiplexing ?
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bi->sr07_1bpp_mux : bi->sr07_1bpp);
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break;
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@ -1018,7 +977,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
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/* pixel mask: pass-through for first plane */
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WGen(cinfo, VGA_PEL_MSK, 0x01);
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if (regs.multiplexing)
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if (cinfo->multiplexing)
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/* hidden dac reg: 1280x1024 */
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WHDR(cinfo, 0x4a);
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else
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@ -1047,7 +1006,7 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
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case BT_ALPINE:
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case BT_GD5480:
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vga_wseq(regbase, CL_SEQR7,
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regs.multiplexing ?
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cinfo->multiplexing ?
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bi->sr07_8bpp_mux : bi->sr07_8bpp);
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break;
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@ -1101,18 +1060,12 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
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/* mode register: 256 color mode */
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vga_wgfx(regbase, VGA_GFX_MODE, 64);
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/* pixel mask: pass-through all planes */
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WGen(cinfo, VGA_PEL_MSK, 0xff);
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if (regs.multiplexing)
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if (cinfo->multiplexing)
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/* hidden dac reg: 1280x1024 */
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WHDR(cinfo, 0x4a);
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else
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/* hidden dac: nothing */
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WHDR(cinfo, 0);
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/* memory mode: chain4, ext. memory */
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vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, 0x0a);
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/* plane mask: enable writing to all 4 planes */
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vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, 0xff);
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}
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/******************************************************
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@ -1177,18 +1130,12 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
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/* mode register: 256 color mode */
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vga_wgfx(regbase, VGA_GFX_MODE, 64);
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/* pixel mask: pass-through all planes */
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WGen(cinfo, VGA_PEL_MSK, 0xff);
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#ifdef CONFIG_PCI
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WHDR(cinfo, 0xc1); /* Copy Xbh */
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#elif defined(CONFIG_ZORRO)
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/* FIXME: CONFIG_PCI and CONFIG_ZORRO may be defined both */
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WHDR(cinfo, 0xa0); /* hidden dac reg: nothing special */
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#endif
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/* memory mode: chain4, ext. memory */
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vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, 0x0a);
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/* plane mask: enable writing to all 4 planes */
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vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, 0xff);
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}
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/******************************************************
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@ -1253,14 +1200,8 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
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/* mode register: 256 color mode */
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vga_wgfx(regbase, VGA_GFX_MODE, 64);
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/* pixel mask: pass-through all planes */
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WGen(cinfo, VGA_PEL_MSK, 0xff);
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/* hidden dac reg: 8-8-8 mode (24 or 32) */
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WHDR(cinfo, 0xc5);
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/* memory mode: chain4, ext. memory */
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vga_wseq(regbase, VGA_SEQ_MEMORY_MODE, 0x0a);
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/* plane mask: enable writing to all 4 planes */
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vga_wseq(regbase, VGA_SEQ_PLANE_WRITE, 0xff);
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}
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/******************************************************
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@ -1309,48 +1250,13 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
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}
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/* text cursor location high */
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vga_wcrt(regbase, VGA_CRTC_CURSOR_HI, 0);
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/* text cursor location low */
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vga_wcrt(regbase, VGA_CRTC_CURSOR_LO, 0);
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/* underline row scanline = at very bottom */
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vga_wcrt(regbase, VGA_CRTC_UNDERLINE, 0);
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/* controller mode */
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vga_wattr(regbase, VGA_ATC_MODE, 1);
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/* overscan (border) color */
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vga_wattr(regbase, VGA_ATC_OVERSCAN, 0);
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/* color plane enable */
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vga_wattr(regbase, VGA_ATC_PLANE_ENABLE, 15);
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/* pixel panning */
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vga_wattr(regbase, CL_AR33, 0);
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/* color select */
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vga_wattr(regbase, VGA_ATC_COLOR_PAGE, 0);
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/* [ EGS: SetOffset(); ] */
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/* From SetOffset(): Turn on VideoEnable bit in Attribute controller */
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AttrOn(cinfo);
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/* set/reset register */
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vga_wgfx(regbase, VGA_GFX_SR_VALUE, 0);
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/* set/reset enable */
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vga_wgfx(regbase, VGA_GFX_SR_ENABLE, 0);
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/* color compare */
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vga_wgfx(regbase, VGA_GFX_COMPARE_VALUE, 0);
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/* data rotate */
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vga_wgfx(regbase, VGA_GFX_DATA_ROTATE, 0);
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/* read map select */
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vga_wgfx(regbase, VGA_GFX_PLANE_READ, 0);
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/* miscellaneous register */
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vga_wgfx(regbase, VGA_GFX_MISC, 1);
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/* color don't care */
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vga_wgfx(regbase, VGA_GFX_COMPARE_MASK, 15);
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/* bit mask */
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vga_wgfx(regbase, VGA_GFX_BIT_MASK, 255);
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/* graphics cursor attributes: nothing special */
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vga_wseq(regbase, CL_SEQR12, 0x0);
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if (cinfo->btype == BT_LAGUNA) {
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/* no tiles */
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fb_writew(control | 0x1000, cinfo->laguna_mmio + 0x402);
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@ -1369,8 +1275,6 @@ static int cirrusfb_set_par_foo(struct fb_info *info)
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vga_wseq(regbase, VGA_SEQ_CLOCK_MODE, tmp);
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dev_dbg(info->device, "CL_SEQR1: %d\n", tmp);
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cinfo->currentmode = regs;
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/* pan to requested offset */
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cirrusfb_pan_display(var, info);
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@ -1443,9 +1347,6 @@ static int cirrusfb_pan_display(struct fb_var_screeninfo *var,
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if (var->vmode & FB_VMODE_YWRAP)
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return -EINVAL;
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info->var.xoffset = var->xoffset;
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info->var.yoffset = var->yoffset;
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xoffset = var->xoffset * info->var.bits_per_pixel / 8;
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yoffset = var->yoffset;
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@ -1480,8 +1381,11 @@ static int cirrusfb_pan_display(struct fb_var_screeninfo *var,
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vga_wcrt(cinfo->regbase, CL_CRT1B, tmp);
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/* construct bit 19 of screen start address */
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if (cirrusfb_board_info[cinfo->btype].scrn_start_bit19)
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vga_wcrt(cinfo->regbase, CL_CRT1D, (base >> 12) & 0x80);
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if (cirrusfb_board_info[cinfo->btype].scrn_start_bit19) {
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tmp = vga_rcrt(cinfo->regbase, CL_CRT1D) & ~0x80;
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tmp |= (base >> 12) & 0x80;
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vga_wcrt(cinfo->regbase, CL_CRT1D, tmp);
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}
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/* write pixel panning value to AR33; this does not quite work in 8bpp
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*
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@ -1670,8 +1574,8 @@ static void init_vgachip(struct fb_info *info)
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vga_wseq(cinfo->regbase, VGA_SEQ_PLANE_WRITE, 0xff);
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/* character map select: doesn't even matter in gx mode */
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vga_wseq(cinfo->regbase, VGA_SEQ_CHARACTER_MAP, 0x00);
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/* memory mode: chain-4, no odd/even, ext. memory */
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vga_wseq(cinfo->regbase, VGA_SEQ_MEMORY_MODE, 0x0e);
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/* memory mode: chain4, ext. memory */
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vga_wseq(cinfo->regbase, VGA_SEQ_MEMORY_MODE, 0x0a);
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/* controller-internal base address of video memory */
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if (bi->init_sr07)
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@ -1784,7 +1688,6 @@ static void init_vgachip(struct fb_info *info)
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vga_wattr(cinfo->regbase, VGA_ATC_OVERSCAN, 0x00);
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/* Color Plane enable: Enable all 4 planes */
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vga_wattr(cinfo->regbase, VGA_ATC_PLANE_ENABLE, 0x0f);
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/* ### vga_wattr(cinfo->regbase, CL_AR33, 0x00); * Pixel Panning: - */
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/* Color Select: - */
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vga_wattr(cinfo->regbase, VGA_ATC_COLOR_PAGE, 0x00);
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@ -2063,6 +1966,21 @@ static void cirrusfb_zorro_unmap(struct fb_info *info)
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}
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#endif /* CONFIG_ZORRO */
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/* function table of the above functions */
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static struct fb_ops cirrusfb_ops = {
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.owner = THIS_MODULE,
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.fb_open = cirrusfb_open,
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.fb_release = cirrusfb_release,
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.fb_setcolreg = cirrusfb_setcolreg,
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.fb_check_var = cirrusfb_check_var,
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.fb_set_par = cirrusfb_set_par,
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.fb_pan_display = cirrusfb_pan_display,
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.fb_blank = cirrusfb_blank,
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.fb_fillrect = cirrusfb_fillrect,
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.fb_copyarea = cirrusfb_copyarea,
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.fb_imageblit = cirrusfb_imageblit,
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};
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static int __devinit cirrusfb_set_fbinfo(struct fb_info *info)
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{
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struct cirrusfb_info *cinfo = info->par;
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@ -2111,12 +2029,9 @@ static int __devinit cirrusfb_register(struct fb_info *info)
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{
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struct cirrusfb_info *cinfo = info->par;
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int err;
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enum cirrus_board btype;
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btype = cinfo->btype;
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/* sanity checks */
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assert(btype != BT_NONE);
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assert(cinfo->btype != BT_NONE);
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/* set all the vital stuff */
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cirrusfb_set_fbinfo(info);
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@ -2132,7 +2047,7 @@ static int __devinit cirrusfb_register(struct fb_info *info)
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info->var.activate = FB_ACTIVATE_NOW;
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err = cirrusfb_decode_var(&info->var, &cinfo->currentmode, info);
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err = cirrusfb_decode_var(&info->var, info);
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if (err < 0) {
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/* should never happen */
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dev_dbg(info->device,
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@ -2174,7 +2089,6 @@ static int __devinit cirrusfb_pci_register(struct pci_dev *pdev,
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{
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struct cirrusfb_info *cinfo;
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struct fb_info *info;
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enum cirrus_board btype;
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unsigned long board_addr, board_size;
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int ret;
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@ -2192,11 +2106,11 @@ static int __devinit cirrusfb_pci_register(struct pci_dev *pdev,
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}
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cinfo = info->par;
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cinfo->btype = btype = (enum cirrus_board) ent->driver_data;
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cinfo->btype = (enum cirrus_board) ent->driver_data;
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dev_dbg(info->device,
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" Found PCI device, base address 0 is 0x%Lx, btype set to %d\n",
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(unsigned long long)pdev->resource[0].start, btype);
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(unsigned long long)pdev->resource[0].start, cinfo->btype);
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dev_dbg(info->device, " base address 1 is 0x%Lx\n",
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(unsigned long long)pdev->resource[1].start);
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@ -2219,7 +2133,7 @@ static int __devinit cirrusfb_pci_register(struct pci_dev *pdev,
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dev_dbg(info->device, "Board address: 0x%lx, register address: 0x%lx\n",
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board_addr, info->fix.mmio_start);
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board_size = (btype == BT_GD5480) ?
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board_size = (cinfo->btype == BT_GD5480) ?
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32 * MB_ : cirrusfb_get_memsize(info, cinfo->regbase);
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ret = pci_request_regions(pdev, "cirrusfb");
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@ -2425,27 +2339,6 @@ static struct zorro_driver cirrusfb_zorro_driver = {
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};
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#endif /* CONFIG_ZORRO */
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static int __init cirrusfb_init(void)
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{
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int error = 0;
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#ifndef MODULE
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char *option = NULL;
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||||
|
||||
if (fb_get_options("cirrusfb", &option))
|
||||
return -ENODEV;
|
||||
cirrusfb_setup(option);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ZORRO
|
||||
error |= zorro_register_driver(&cirrusfb_zorro_driver);
|
||||
#endif
|
||||
#ifdef CONFIG_PCI
|
||||
error |= pci_register_driver(&cirrusfb_pci_driver);
|
||||
#endif
|
||||
return error;
|
||||
}
|
||||
|
||||
#ifndef MODULE
|
||||
static int __init cirrusfb_setup(char *options)
|
||||
{
|
||||
|
|
@ -2477,6 +2370,27 @@ MODULE_AUTHOR("Copyright 1999,2000 Jeff Garzik <jgarzik@pobox.com>");
|
|||
MODULE_DESCRIPTION("Accelerated FBDev driver for Cirrus Logic chips");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
static int __init cirrusfb_init(void)
|
||||
{
|
||||
int error = 0;
|
||||
|
||||
#ifndef MODULE
|
||||
char *option = NULL;
|
||||
|
||||
if (fb_get_options("cirrusfb", &option))
|
||||
return -ENODEV;
|
||||
cirrusfb_setup(option);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ZORRO
|
||||
error |= zorro_register_driver(&cirrusfb_zorro_driver);
|
||||
#endif
|
||||
#ifdef CONFIG_PCI
|
||||
error |= pci_register_driver(&cirrusfb_pci_driver);
|
||||
#endif
|
||||
return error;
|
||||
}
|
||||
|
||||
static void __exit cirrusfb_exit(void)
|
||||
{
|
||||
#ifdef CONFIG_PCI
|
||||
|
|
@ -2683,7 +2597,7 @@ static void cirrusfb_WaitBLT(u8 __iomem *regbase)
|
|||
{
|
||||
/* now busy-wait until we're done */
|
||||
while (vga_rgfx(regbase, CL_GR31) & 0x08)
|
||||
/* do nothing */ ;
|
||||
cpu_relax();
|
||||
}
|
||||
|
||||
/*******************************************************************
|
||||
|
|
|
|||
Loading…
Reference in a new issue