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arm64: entry: Add non-kpti __bp_harden_el1_vectors for mitigations
commit aff65393fa
upstream.
kpti is an optional feature, for systems not using kpti a set of
vectors for the spectre-bhb mitigations is needed.
Add another set of vectors, __bp_harden_el1_vectors, that will be
used if a mitigation is needed and kpti is not in use.
The EL1 ventries are repeated verbatim as there is no additional
work needed for entry from EL1.
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: James Morse <james.morse@arm.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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1 changed files with 34 additions and 1 deletions
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@ -819,10 +819,11 @@ alternative_else_nop_endif
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.macro tramp_ventry, vector_start, regsize, kpti
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.align 7
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1:
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.if \kpti == 1
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.if \regsize == 64
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msr tpidrro_el0, x30 // Restored in kernel_ventry
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.endif
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.if \kpti == 1
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/*
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* Defend against branch aliasing attacks by pushing a dummy
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* entry onto the return stack and using a RET instruction to
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@ -909,6 +910,38 @@ SYM_DATA_END(__entry_tramp_data_start)
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#endif /* CONFIG_RANDOMIZE_BASE */
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#endif /* CONFIG_UNMAP_KERNEL_AT_EL0 */
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/*
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* Exception vectors for spectre mitigations on entry from EL1 when
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* kpti is not in use.
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*/
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.macro generate_el1_vector
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.Lvector_start\@:
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kernel_ventry 1, sync_invalid // Synchronous EL1t
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kernel_ventry 1, irq_invalid // IRQ EL1t
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kernel_ventry 1, fiq_invalid // FIQ EL1t
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kernel_ventry 1, error_invalid // Error EL1t
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kernel_ventry 1, sync // Synchronous EL1h
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kernel_ventry 1, irq // IRQ EL1h
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kernel_ventry 1, fiq_invalid // FIQ EL1h
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kernel_ventry 1, error // Error EL1h
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.rept 4
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tramp_ventry .Lvector_start\@, 64, kpti=0
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.endr
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.rept 4
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tramp_ventry .Lvector_start\@, 32, kpti=0
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.endr
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.endm
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.pushsection ".entry.text", "ax"
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.align 11
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SYM_CODE_START(__bp_harden_el1_vectors)
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generate_el1_vector
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SYM_CODE_END(__bp_harden_el1_vectors)
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.popsection
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/*
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* Register switch for AArch64. The callee-saved registers need to be saved
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* and restored. On entry:
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