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drm/i915/ddi: Flush encoder power domain ref puts during driver unload

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An async-put on an encoder specific power domain (for instance the AUX
PW domain) may be pending when removing the encoder. Make sure any such
async-puts are complete while the corresponding encoder is still in place
since at least AUX power wells require this to do a power well->PHY
lookup.

Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210526143729.2563672-1-imre.deak@intel.com
This commit is contained in:
Imre Deak 2021-05-26 17:37:27 +03:00
parent 3ed131e5a4
commit 4a300e65b5
1 changed files with 2 additions and 0 deletions
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2
drivers/gpu/drm/i915/display/intel_ddi.c
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@ -4063,9 +4063,11 @@ static int intel_ddi_compute_config_late(struct intel_encoder *encoder,
static void intel_ddi_encoder_destroy(struct drm_encoder *encoder)
{
struct drm_i915_private *i915 = to_i915(encoder->dev);
struct intel_digital_port *dig_port = enc_to_dig_port(to_intel_encoder(encoder));
intel_dp_encoder_flush_work(encoder);
intel_display_power_flush_work(i915);
drm_encoder_cleanup(encoder);
if (dig_port)