drm/amd/amdgpu: set MP1 state to UNLOAD before reload its FW for vega20/ALDEBARAN

When resume from gpu reset, need set MP1 state to UNLOAD before reload SMU
FW otherwise will cause following errors:
[  121.642772] [drm] reserve 0x400000 from 0x87fec00000 for PSP TMR [  123.801051] [drm] failed to load ucode id (24) [  123.801055] [drm] psp command (0x6) failed and response status is (0x0) [  123.801214] [drm:psp_load_smu_fw [amdgpu]] *ERROR* PSP load smu failed!
[  123.801398] [drm:psp_resume [amdgpu]] *ERROR* PSP resume failed [  123.801536] [drm:amdgpu_device_fw_loading [amdgpu]] *ERROR* resume of IP block <psp> failed -22 [  123.801632] amdgpu 0000:04:00.0: amdgpu: GPU reset(9) failed [  123.801691] amdgpu 0000:07:00.0: amdgpu: GPU reset(9) failed [  123.802899] amdgpu 0000:04:00.0: amdgpu: GPU reset end with ret = -22

v2: add error info and including ALDEBARAN also

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-and-tested-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Feifei Xu <Feifei.Xu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Chengming Gui 2021-03-18 17:10:58 +08:00 committed by Alex Deucher
parent 404b277bbe
commit 4a7ffbdb27

View file

@ -2171,7 +2171,9 @@ static int psp_load_smu_fw(struct psp_context *psp)
if ((amdgpu_in_reset(adev) &&
ras && ras->supported &&
adev->asic_type == CHIP_ARCTURUS) ||
(adev->asic_type == CHIP_ARCTURUS ||
adev->asic_type == CHIP_VEGA20 ||
adev->asic_type == CHIP_ALDEBARAN)) ||
(adev->in_runpm &&
adev->asic_type >= CHIP_NAVI10 &&
adev->asic_type <= CHIP_NAVI12)) {