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thermal: armada: Fix register offsets for AXP 

As shown in its device tree, Armada XP has the control1 register at
0x184d0, not 0x182d0.

Signed-off-by: Zachary Hays <zhays@lexmark.com>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/BN8PR10MB337990B7688320D736760BB68C580@BN8PR10MB3379.namprd10.prod.outlook.com
This commit is contained in:
Zak Hays 2019-12-09 18:55:51 +00:00 committed by Daniel Lezcano
parent 2b586feab4
commit 4abb629bea
1 changed files with 1 additions and 1 deletions
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2
drivers/thermal/armada_thermal.c
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@ -578,7 +578,7 @@ static const struct armada_thermal_data armadaxp_data = {
.coef_m = 10000000ULL,
.coef_div = 13825,
.syscon_status_off = 0xb0,
.syscon_control1_off = 0xd0,
.syscon_control1_off = 0x2d0,
};
static const struct armada_thermal_data armada370_data = {