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mmc: dw_mmc: update kernel-doc comments for dw_mci
cur_slot and num_slots has been removed from struct dw_mci in 42f989c002
.
Unfortunately, inline documentation was not updated so far.
Fix @lock field documentation in Locking section.
Move @mrq field of struct dw_mci_slot mention closer to it
description, so no one could miss this slightest detail.
Couple of code style fixes as a bonus.
Signed-off-by: Alexey Roslyakov <alexey.roslyakov@gmail.com>
Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
parent
ec10ab572e
commit
4b514fa287
1 changed files with 9 additions and 10 deletions
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@ -65,8 +65,7 @@ struct dw_mci_dma_slave {
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* @fifo_reg: Pointer to MMIO registers for data FIFO
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* @sg: Scatterlist entry currently being processed by PIO code, if any.
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* @sg_miter: PIO mapping scatterlist iterator.
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* @cur_slot: The slot which is currently using the controller.
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* @mrq: The request currently being processed on @cur_slot,
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* @mrq: The request currently being processed on @slot,
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* or NULL if the controller is idle.
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* @cmd: The command currently being sent to the card, or NULL.
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* @data: The data currently being transferred, or NULL if no data
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@ -102,7 +101,6 @@ struct dw_mci_dma_slave {
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* @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus
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* rate and timeout calculations.
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* @current_speed: Configured rate of the controller.
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* @num_slots: Number of slots available.
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* @fifoth_val: The value of FIFOTH register.
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* @verid: Denote Version ID.
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* @dev: Device associated with the MMC controller.
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@ -134,17 +132,17 @@ struct dw_mci_dma_slave {
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* =======
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*
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* @lock is a softirq-safe spinlock protecting @queue as well as
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* @slot, @mrq and @state. These must always be updated
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* at the same time while holding @lock.
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* The @mrq field of struct dw_mci_slot is also protected by @lock,
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* and must always be written at the same time as the slot is added to
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* @queue.
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*
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* @irq_lock is an irq-safe spinlock protecting the INTMASK register
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* to allow the interrupt handler to modify it directly. Held for only long
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* enough to read-modify-write INTMASK and no other locks are grabbed when
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* holding this one.
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*
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* The @mrq field of struct dw_mci_slot is also protected by @lock,
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* and must always be written at the same time as the slot is added to
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* @queue.
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*
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* @pending_events and @completed_events are accessed using atomic bit
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* operations, so they don't need any locking.
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*
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@ -321,8 +319,8 @@ struct dw_mci_board {
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#define SDMMC_ENABLE_SHIFT 0x110
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#define SDMMC_DATA(x) (x)
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/*
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* Registers to support idmac 64-bit address mode
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*/
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* Registers to support idmac 64-bit address mode
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*/
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#define SDMMC_DBADDRL 0x088
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#define SDMMC_DBADDRU 0x08c
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#define SDMMC_IDSTS64 0x090
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@ -449,7 +447,8 @@ struct dw_mci_board {
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(SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | SDMMC_CTRL_DMA_RESET)
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/* FIFO register access macros. These should not change the data endian-ness
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* as they are written to memory to be dealt with by the upper layers */
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* as they are written to memory to be dealt with by the upper layers
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*/
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#define mci_fifo_readw(__reg) __raw_readw(__reg)
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#define mci_fifo_readl(__reg) __raw_readl(__reg)
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#define mci_fifo_readq(__reg) __raw_readq(__reg)
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