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drm/nouveau/clk: Allow boosting only when NvBoost is set
0: base clock from the vbios is max clock (default) 1: boost only to boost clock from the vbios 2: boost to max clock available v2: Moved into nvkm_cstate_valid. v4: Check the existence of the clocks before limiting. v5: Default to boost level 0. Signed-off-by: Karol Herbst <karolherbst@gmail.com> Reviewed-by: Martin Peres <martin.peres@free.fr> Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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4 changed files with 42 additions and 4 deletions
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@ -72,7 +72,8 @@ struct nvkm_pstate {
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struct nvkm_domain {
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enum nv_clk_src name;
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u8 bios; /* 0xff for none */
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#define NVKM_CLK_DOM_FLAG_CORE 0x01
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#define NVKM_CLK_DOM_FLAG_CORE 0x01
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#define NVKM_CLK_DOM_FLAG_VPSTATE 0x02
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u8 flags;
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const char *mname;
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int mdiv;
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@ -102,6 +103,12 @@ struct nvkm_clk {
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u8 temp;
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bool allow_reclock;
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#define NVKM_CLK_BOOST_NONE 0x0
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#define NVKM_CLK_BOOST_BIOS 0x1
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#define NVKM_CLK_BOOST_FULL 0x2
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u8 boost_mode;
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u32 base_khz;
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u32 boost_khz;
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/*XXX: die, these are here *only* to support the completely
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* bat-shit insane what-was-nouveau_hw.c code
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@ -27,6 +27,7 @@
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#include <subdev/bios/boost.h>
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#include <subdev/bios/cstep.h>
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#include <subdev/bios/perf.h>
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#include <subdev/bios/vpstate.h>
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#include <subdev/fb.h>
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#include <subdev/therm.h>
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#include <subdev/volt.h>
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@ -78,9 +79,25 @@ static bool
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nvkm_cstate_valid(struct nvkm_clk *clk, struct nvkm_cstate *cstate,
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u32 max_volt, int temp)
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{
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const struct nvkm_domain *domain = clk->domains;
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struct nvkm_volt *volt = clk->subdev.device->volt;
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int voltage;
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while (domain && domain->name != nv_clk_src_max) {
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if (domain->flags & NVKM_CLK_DOM_FLAG_VPSTATE) {
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u32 freq = cstate->domain[domain->name];
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switch (clk->boost_mode) {
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case NVKM_CLK_BOOST_NONE:
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if (clk->base_khz && freq > clk->base_khz)
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return false;
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case NVKM_CLK_BOOST_BIOS:
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if (clk->boost_khz && freq > clk->boost_khz)
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return false;
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}
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}
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domain++;
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}
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if (!volt)
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return true;
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@ -635,10 +652,22 @@ int
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nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device,
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int index, bool allow_reclock, struct nvkm_clk *clk)
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{
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struct nvkm_subdev *subdev = &clk->subdev;
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struct nvkm_bios *bios = device->bios;
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int ret, idx, arglen;
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const char *mode;
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struct nvbios_vpstate_header h;
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nvkm_subdev_ctor(&nvkm_clk, device, index, subdev);
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if (bios && !nvbios_vpstate_parse(bios, &h)) {
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struct nvbios_vpstate_entry base, boost;
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if (!nvbios_vpstate_entry(bios, &h, h.boost_id, &boost))
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clk->boost_khz = boost.clock_mhz * 1000;
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if (!nvbios_vpstate_entry(bios, &h, h.base_id, &base))
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clk->base_khz = base.clock_mhz * 1000;
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}
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nvkm_subdev_ctor(&nvkm_clk, device, index, &clk->subdev);
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clk->func = func;
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INIT_LIST_HEAD(&clk->states);
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clk->domains = func->domains;
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@ -681,6 +710,8 @@ nvkm_clk_ctor(const struct nvkm_clk_func *func, struct nvkm_device *device,
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if (mode)
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clk->ustate_dc = nvkm_clk_nstate(clk, mode, arglen);
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clk->boost_mode = nvkm_longopt(device->cfgopt, "NvBoost",
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NVKM_CLK_BOOST_NONE);
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return 0;
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}
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@ -457,7 +457,7 @@ gf100_clk = {
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{ nv_clk_src_hubk06 , 0x00 },
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{ nv_clk_src_hubk01 , 0x01 },
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{ nv_clk_src_copy , 0x02 },
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{ nv_clk_src_gpc , 0x03, 0, "core", 2000 },
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{ nv_clk_src_gpc , 0x03, NVKM_CLK_DOM_FLAG_VPSTATE, "core", 2000 },
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{ nv_clk_src_rop , 0x04 },
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{ nv_clk_src_mem , 0x05, 0, "memory", 1000 },
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{ nv_clk_src_vdec , 0x06 },
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@ -491,7 +491,7 @@ gk104_clk = {
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.domains = {
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{ nv_clk_src_crystal, 0xff },
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{ nv_clk_src_href , 0xff },
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{ nv_clk_src_gpc , 0x00, NVKM_CLK_DOM_FLAG_CORE, "core", 2000 },
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{ nv_clk_src_gpc , 0x00, NVKM_CLK_DOM_FLAG_CORE | NVKM_CLK_DOM_FLAG_VPSTATE, "core", 2000 },
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{ nv_clk_src_hubk07 , 0x01, NVKM_CLK_DOM_FLAG_CORE },
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{ nv_clk_src_rop , 0x02, NVKM_CLK_DOM_FLAG_CORE },
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{ nv_clk_src_mem , 0x03, 0, "memory", 500 },
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