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arm64: tegra: Add Host1x and VIC on Tegra234
Add device tree nodes for Host1x and VIC on Tegra234. Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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1 changed files with 46 additions and 0 deletions
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@ -541,6 +541,52 @@ timer@2080000 {
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status = "okay";
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status = "okay";
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};
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};
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host1x@13e00000 {
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compatible = "nvidia,tegra234-host1x";
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reg = <0x13e00000 0x10000>,
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<0x13e10000 0x10000>,
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<0x13e40000 0x10000>;
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reg-names = "common", "hypervisor", "vm";
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interrupts = <GIC_SPI 448 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 449 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 450 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 452 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 453 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 454 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 455 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 263 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "syncpt0", "syncpt1", "syncpt2", "syncpt3", "syncpt4",
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"syncpt5", "syncpt6", "syncpt7", "host1x";
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clocks = <&bpmp TEGRA234_CLK_HOST1X>;
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clock-names = "host1x";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x15000000 0x15000000 0x01000000>;
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interconnects = <&mc TEGRA234_MEMORY_CLIENT_HOST1XDMAR &emc>;
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interconnect-names = "dma-mem";
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iommus = <&smmu_niso1 TEGRA234_SID_HOST1X>;
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vic@15340000 {
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compatible = "nvidia,tegra234-vic";
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reg = <0x15340000 0x00040000>;
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interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&bpmp TEGRA234_CLK_VIC>;
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clock-names = "vic";
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resets = <&bpmp TEGRA234_RESET_VIC>;
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reset-names = "vic";
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power-domains = <&bpmp TEGRA234_POWER_DOMAIN_VIC>;
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interconnects = <&mc TEGRA234_MEMORY_CLIENT_VICSRD &emc>,
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<&mc TEGRA234_MEMORY_CLIENT_VICSWR &emc>;
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interconnect-names = "dma-mem", "write";
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iommus = <&smmu_niso1 TEGRA234_SID_VIC>;
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dma-coherent;
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};
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};
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gpio: gpio@2200000 {
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gpio: gpio@2200000 {
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compatible = "nvidia,tegra234-gpio";
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compatible = "nvidia,tegra234-gpio";
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reg-names = "security", "gpio";
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reg-names = "security", "gpio";
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