mirror of
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-10-01 14:44:12 +00:00
ARM: dts: r8a7790: add soc node
Add soc node to represent the bus and move all nodes with a base address into this node. This is consistent with handling of R-Car Gen3, RZ/G1, and R-Car V2H (R8A77920) SoCs upstream. It is intended to migrate other R-Car Gen2 SoCs to this scheme. The ordering is derived from simply moving each node with an address up to before any nodes without a base address that occur before the soc node. To improve maintainability follow-up patches will sort subnodes of both the new soc node and the root node. This patch should not introduce any functional change. Signed-off-by: Simon Horman <horms+renesas@verge.net.au> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Simon Horman
parent
41b3568dc4
commit
4bdb7aa7dc
1 changed files with 1497 additions and 1427 deletions
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@ -17,7 +17,6 @@
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/ {
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compatible = "renesas,r8a7790";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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@ -159,24 +158,13 @@ L2_CA7: cache-controller-1 {
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};
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};
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thermal-zones {
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cpu_thermal: cpu-thermal {
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polling-delay-passive = <0>;
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polling-delay = <0>;
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soc {
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compatible = "simple-bus";
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interrupt-parent = <&gic>;
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thermal-sensors = <&thermal>;
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trips {
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cpu-crit {
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temperature = <95000>;
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hysteresis = <0>;
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type = "critical";
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};
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};
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cooling-maps {
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};
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};
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};
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#address-cells = <2>;
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#size-cells = <2>;
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ranges;
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apmu@e6151000 {
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compatible = "renesas,r8a7790-apmu", "renesas,apmu";
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@ -195,10 +183,8 @@ gic: interrupt-controller@f1001000 {
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#interrupt-cells = <3>;
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#address-cells = <0>;
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interrupt-controller;
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reg = <0 0xf1001000 0 0x1000>,
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<0 0xf1002000 0 0x2000>,
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<0 0xf1004000 0 0x2000>,
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<0 0xf1006000 0 0x2000>;
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reg = <0 0xf1001000 0 0x1000>, <0 0xf1002000 0 0x2000>,
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<0 0xf1004000 0 0x2000>, <0 0xf1006000 0 0x2000>;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
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clocks = <&cpg CPG_MOD 408>;
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clock-names = "clk";
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@ -207,7 +193,8 @@ gic: interrupt-controller@f1001000 {
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};
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gpio0: gpio@e6050000 {
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compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
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compatible = "renesas,gpio-r8a7790",
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"renesas,rcar-gen2-gpio";
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reg = <0 0xe6050000 0 0x50>;
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interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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@ -221,7 +208,8 @@ gpio0: gpio@e6050000 {
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};
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gpio1: gpio@e6051000 {
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compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
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compatible = "renesas,gpio-r8a7790",
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"renesas,rcar-gen2-gpio";
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reg = <0 0xe6051000 0 0x50>;
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interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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@ -235,7 +223,8 @@ gpio1: gpio@e6051000 {
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};
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gpio2: gpio@e6052000 {
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compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
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compatible = "renesas,gpio-r8a7790",
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"renesas,rcar-gen2-gpio";
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reg = <0 0xe6052000 0 0x50>;
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interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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@ -249,7 +238,8 @@ gpio2: gpio@e6052000 {
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};
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gpio3: gpio@e6053000 {
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compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
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compatible = "renesas,gpio-r8a7790",
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"renesas,rcar-gen2-gpio";
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reg = <0 0xe6053000 0 0x50>;
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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@ -263,7 +253,8 @@ gpio3: gpio@e6053000 {
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};
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gpio4: gpio@e6054000 {
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compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
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compatible = "renesas,gpio-r8a7790",
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"renesas,rcar-gen2-gpio";
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reg = <0 0xe6054000 0 0x50>;
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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@ -277,7 +268,8 @@ gpio4: gpio@e6054000 {
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};
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gpio5: gpio@e6055000 {
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compatible = "renesas,gpio-r8a7790", "renesas,rcar-gen2-gpio";
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compatible = "renesas,gpio-r8a7790",
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"renesas,rcar-gen2-gpio";
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reg = <0 0xe6055000 0 0x50>;
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
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#gpio-cells = <2>;
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@ -302,16 +294,9 @@ thermal: thermal@e61f0000 {
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#thermal-sensor-cells = <0>;
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};
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timer {
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compatible = "arm,armv7-timer";
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interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
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};
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cmt0: timer@ffca0000 {
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compatible = "renesas,r8a7790-cmt0", "renesas,rcar-gen2-cmt0";
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compatible = "renesas,r8a7790-cmt0",
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"renesas,rcar-gen2-cmt0";
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reg = <0 0xffca0000 0 0x1004>;
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interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
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@ -324,7 +309,8 @@ cmt0: timer@ffca0000 {
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};
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cmt1: timer@e6130000 {
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compatible = "renesas,r8a7790-cmt1", "renesas,rcar-gen2-cmt1";
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compatible = "renesas,r8a7790-cmt1",
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"renesas,rcar-gen2-cmt1";
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reg = <0 0xe6130000 0 0x1004>;
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interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
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@ -357,7 +343,8 @@ irqc0: interrupt-controller@e61c0000 {
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};
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dmac0: dma-controller@e6700000 {
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compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
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compatible = "renesas,dmac-r8a7790",
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"renesas,rcar-dmac";
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reg = <0 0xe6700000 0 0x20000>;
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interrupts = <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
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@ -389,7 +376,8 @@ GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
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};
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dmac1: dma-controller@e6720000 {
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compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
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compatible = "renesas,dmac-r8a7790",
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"renesas,rcar-dmac";
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reg = <0 0xe6720000 0 0x20000>;
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interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
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@ -421,7 +409,8 @@ GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
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};
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audma0: dma-controller@ec700000 {
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compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
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compatible = "renesas,dmac-r8a7790",
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"renesas,rcar-dmac";
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reg = <0 0xec700000 0 0x10000>;
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interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
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@ -451,7 +440,8 @@ GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
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};
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audma1: dma-controller@ec720000 {
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compatible = "renesas,dmac-r8a7790", "renesas,rcar-dmac";
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compatible = "renesas,dmac-r8a7790",
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"renesas,rcar-dmac";
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reg = <0 0xec720000 0 0x10000>;
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interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
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@ -481,7 +471,8 @@ GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
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};
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usb_dmac0: dma-controller@e65a0000 {
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compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
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compatible = "renesas,r8a7790-usb-dmac",
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"renesas,usb-dmac";
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reg = <0 0xe65a0000 0 0x100>;
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interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
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@ -494,7 +485,8 @@ usb_dmac0: dma-controller@e65a0000 {
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};
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usb_dmac1: dma-controller@e65b0000 {
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compatible = "renesas,r8a7790-usb-dmac", "renesas,usb-dmac";
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compatible = "renesas,r8a7790-usb-dmac",
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"renesas,usb-dmac";
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reg = <0 0xe65b0000 0 0x100>;
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interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
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GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
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@ -509,7 +501,8 @@ usb_dmac1: dma-controller@e65b0000 {
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i2c0: i2c@e6508000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
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compatible = "renesas,i2c-r8a7790",
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"renesas,rcar-gen2-i2c";
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reg = <0 0xe6508000 0 0x40>;
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interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 931>;
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@ -522,7 +515,8 @@ i2c0: i2c@e6508000 {
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i2c1: i2c@e6518000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
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compatible = "renesas,i2c-r8a7790",
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"renesas,rcar-gen2-i2c";
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reg = <0 0xe6518000 0 0x40>;
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interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 930>;
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@ -535,7 +529,8 @@ i2c1: i2c@e6518000 {
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i2c2: i2c@e6530000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
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compatible = "renesas,i2c-r8a7790",
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"renesas,rcar-gen2-i2c";
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reg = <0 0xe6530000 0 0x40>;
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interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 929>;
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@ -548,7 +543,8 @@ i2c2: i2c@e6530000 {
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i2c3: i2c@e6540000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,i2c-r8a7790", "renesas,rcar-gen2-i2c";
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compatible = "renesas,i2c-r8a7790",
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"renesas,rcar-gen2-i2c";
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reg = <0 0xe6540000 0 0x40>;
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interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 928>;
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@ -561,7 +557,8 @@ i2c3: i2c@e6540000 {
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iic0: i2c@e6500000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
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compatible = "renesas,iic-r8a7790",
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"renesas,rcar-gen2-iic",
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"renesas,rmobile-iic";
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reg = <0 0xe6500000 0 0x425>;
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interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
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@ -577,7 +574,8 @@ iic0: i2c@e6500000 {
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iic1: i2c@e6510000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
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compatible = "renesas,iic-r8a7790",
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"renesas,rcar-gen2-iic",
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"renesas,rmobile-iic";
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reg = <0 0xe6510000 0 0x425>;
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interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>;
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@ -593,7 +591,8 @@ iic1: i2c@e6510000 {
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iic2: i2c@e6520000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
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compatible = "renesas,iic-r8a7790",
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"renesas,rcar-gen2-iic",
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"renesas,rmobile-iic";
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reg = <0 0xe6520000 0 0x425>;
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interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
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@ -609,7 +608,8 @@ iic2: i2c@e6520000 {
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iic3: i2c@e60b0000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "renesas,iic-r8a7790", "renesas,rcar-gen2-iic",
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compatible = "renesas,iic-r8a7790",
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"renesas,rcar-gen2-iic",
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"renesas,rmobile-iic";
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reg = <0 0xe60b0000 0 0x425>;
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interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
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@ -623,7 +623,8 @@ iic3: i2c@e60b0000 {
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};
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mmcif0: mmc@ee200000 {
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compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
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compatible = "renesas,mmcif-r8a7790",
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"renesas,sh-mmcif";
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reg = <0 0xee200000 0 0x80>;
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interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 315>;
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@ -638,7 +639,8 @@ mmcif0: mmc@ee200000 {
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};
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mmcif1: mmc@ee220000 {
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compatible = "renesas,mmcif-r8a7790", "renesas,sh-mmcif";
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compatible = "renesas,mmcif-r8a7790",
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"renesas,sh-mmcif";
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reg = <0 0xee220000 0 0x80>;
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interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 305>;
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@ -808,12 +810,13 @@ scifb2: serial@e6ce0000 {
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};
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scif0: serial@e6e60000 {
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compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
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compatible = "renesas,scif-r8a7790",
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"renesas,rcar-gen2-scif",
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"renesas,scif";
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reg = <0 0xe6e60000 0 64>;
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interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 721>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
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<&scif_clk>;
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clocks = <&cpg CPG_MOD 721>,
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<&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac0 0x29>, <&dmac0 0x2a>,
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<&dmac1 0x29>, <&dmac1 0x2a>;
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@ -824,12 +827,13 @@ scif0: serial@e6e60000 {
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};
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scif1: serial@e6e68000 {
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compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
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compatible = "renesas,scif-r8a7790",
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"renesas,rcar-gen2-scif",
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"renesas,scif";
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reg = <0 0xe6e68000 0 64>;
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interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cpg CPG_MOD 720>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
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<&scif_clk>;
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clocks = <&cpg CPG_MOD 720>,
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<&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
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clock-names = "fck", "brg_int", "scif_clk";
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dmas = <&dmac0 0x2d>, <&dmac0 0x2e>,
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<&dmac1 0x2d>, <&dmac1 0x2e>;
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@ -840,12 +844,13 @@ scif1: serial@e6e68000 {
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};
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scif2: serial@e6e56000 {
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compatible = "renesas,scif-r8a7790", "renesas,rcar-gen2-scif",
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compatible = "renesas,scif-r8a7790",
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"renesas,rcar-gen2-scif",
|
||||
"renesas,scif";
|
||||
reg = <0 0xe6e56000 0 64>;
|
||||
interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 310>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
|
||||
<&scif_clk>;
|
||||
clocks = <&cpg CPG_MOD 310>,
|
||||
<&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac0 0x2b>, <&dmac0 0x2c>,
|
||||
<&dmac1 0x2b>, <&dmac1 0x2c>;
|
||||
|
|
@ -860,8 +865,8 @@ hscif0: serial@e62c0000 {
|
|||
"renesas,rcar-gen2-hscif", "renesas,hscif";
|
||||
reg = <0 0xe62c0000 0 96>;
|
||||
interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 717>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
|
||||
<&scif_clk>;
|
||||
clocks = <&cpg CPG_MOD 717>,
|
||||
<&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac0 0x39>, <&dmac0 0x3a>,
|
||||
<&dmac1 0x39>, <&dmac1 0x3a>;
|
||||
|
|
@ -876,8 +881,8 @@ hscif1: serial@e62c8000 {
|
|||
"renesas,rcar-gen2-hscif", "renesas,hscif";
|
||||
reg = <0 0xe62c8000 0 96>;
|
||||
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 716>, <&cpg CPG_CORE R8A7790_CLK_ZS>,
|
||||
<&scif_clk>;
|
||||
clocks = <&cpg CPG_MOD 716>,
|
||||
<&cpg CPG_CORE R8A7790_CLK_ZS>, <&scif_clk>;
|
||||
clock-names = "fck", "brg_int", "scif_clk";
|
||||
dmas = <&dmac0 0x4d>, <&dmac0 0x4e>,
|
||||
<&dmac1 0x4d>, <&dmac1 0x4e>;
|
||||
|
|
@ -933,7 +938,8 @@ avb: ethernet@e6800000 {
|
|||
};
|
||||
|
||||
sata0: sata@ee300000 {
|
||||
compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
|
||||
compatible = "renesas,sata-r8a7790",
|
||||
"renesas,rcar-gen2-sata";
|
||||
reg = <0 0xee300000 0 0x2000>;
|
||||
interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 815>;
|
||||
|
|
@ -943,7 +949,8 @@ sata0: sata@ee300000 {
|
|||
};
|
||||
|
||||
sata1: sata@ee500000 {
|
||||
compatible = "renesas,sata-r8a7790", "renesas,rcar-gen2-sata";
|
||||
compatible = "renesas,sata-r8a7790",
|
||||
"renesas,rcar-gen2-sata";
|
||||
reg = <0 0xee500000 0 0x2000>;
|
||||
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 814>;
|
||||
|
|
@ -953,7 +960,8 @@ sata1: sata@ee500000 {
|
|||
};
|
||||
|
||||
hsusb: usb@e6590000 {
|
||||
compatible = "renesas,usbhs-r8a7790", "renesas,rcar-gen2-usbhs";
|
||||
compatible = "renesas,usbhs-r8a7790",
|
||||
"renesas,rcar-gen2-usbhs";
|
||||
reg = <0 0xe6590000 0 0x100>;
|
||||
interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 704>;
|
||||
|
|
@ -991,7 +999,8 @@ usb2: usb-channel@2 {
|
|||
};
|
||||
|
||||
vin0: video@e6ef0000 {
|
||||
compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
|
||||
compatible = "renesas,vin-r8a7790",
|
||||
"renesas,rcar-gen2-vin";
|
||||
reg = <0 0xe6ef0000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 811>;
|
||||
|
|
@ -1001,7 +1010,8 @@ vin0: video@e6ef0000 {
|
|||
};
|
||||
|
||||
vin1: video@e6ef1000 {
|
||||
compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
|
||||
compatible = "renesas,vin-r8a7790",
|
||||
"renesas,rcar-gen2-vin";
|
||||
reg = <0 0xe6ef1000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 810>;
|
||||
|
|
@ -1011,7 +1021,8 @@ vin1: video@e6ef1000 {
|
|||
};
|
||||
|
||||
vin2: video@e6ef2000 {
|
||||
compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
|
||||
compatible = "renesas,vin-r8a7790",
|
||||
"renesas,rcar-gen2-vin";
|
||||
reg = <0 0xe6ef2000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 809>;
|
||||
|
|
@ -1021,7 +1032,8 @@ vin2: video@e6ef2000 {
|
|||
};
|
||||
|
||||
vin3: video@e6ef3000 {
|
||||
compatible = "renesas,vin-r8a7790", "renesas,rcar-gen2-vin";
|
||||
compatible = "renesas,vin-r8a7790",
|
||||
"renesas,rcar-gen2-vin";
|
||||
reg = <0 0xe6ef3000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 808>;
|
||||
|
|
@ -1078,7 +1090,8 @@ du: display@feb00000 {
|
|||
clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
|
||||
<&cpg CPG_MOD 722>, <&cpg CPG_MOD 726>,
|
||||
<&cpg CPG_MOD 725>;
|
||||
clock-names = "du.0", "du.1", "du.2", "lvds.0", "lvds.1";
|
||||
clock-names = "du.0", "du.1", "du.2", "lvds.0",
|
||||
"lvds.1";
|
||||
status = "disabled";
|
||||
|
||||
ports {
|
||||
|
|
@ -1104,11 +1117,12 @@ du_out_lvds1: endpoint {
|
|||
};
|
||||
|
||||
can0: can@e6e80000 {
|
||||
compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
|
||||
compatible = "renesas,can-r8a7790",
|
||||
"renesas,rcar-gen2-can";
|
||||
reg = <0 0xe6e80000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 916>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
|
||||
<&can_clk>;
|
||||
clocks = <&cpg CPG_MOD 916>,
|
||||
<&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
|
||||
clock-names = "clkp1", "clkp2", "can_clk";
|
||||
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 916>;
|
||||
|
|
@ -1116,11 +1130,12 @@ can0: can@e6e80000 {
|
|||
};
|
||||
|
||||
can1: can@e6e88000 {
|
||||
compatible = "renesas,can-r8a7790", "renesas,rcar-gen2-can";
|
||||
compatible = "renesas,can-r8a7790",
|
||||
"renesas,rcar-gen2-can";
|
||||
reg = <0 0xe6e88000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 915>, <&cpg CPG_CORE R8A7790_CLK_RCAN>,
|
||||
<&can_clk>;
|
||||
clocks = <&cpg CPG_MOD 915>,
|
||||
<&cpg CPG_CORE R8A7790_CLK_RCAN>, <&can_clk>;
|
||||
clock-names = "clkp1", "clkp2", "can_clk";
|
||||
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 915>;
|
||||
|
|
@ -1128,7 +1143,8 @@ can1: can@e6e88000 {
|
|||
};
|
||||
|
||||
jpu: jpeg-codec@fe980000 {
|
||||
compatible = "renesas,jpu-r8a7790", "renesas,rcar-gen2-jpu";
|
||||
compatible = "renesas,jpu-r8a7790",
|
||||
"renesas,rcar-gen2-jpu";
|
||||
reg = <0 0xfe980000 0 0x10300>;
|
||||
interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 106>;
|
||||
|
|
@ -1136,65 +1152,6 @@ jpu: jpeg-codec@fe980000 {
|
|||
resets = <&cpg 106>;
|
||||
};
|
||||
|
||||
/* External root clock */
|
||||
extal_clk: extal {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
/* External PCIe clock - can be overridden by the board */
|
||||
pcie_bus_clk: pcie_bus {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
/*
|
||||
* The external audio clocks are configured as 0 Hz fixed frequency
|
||||
* clocks by default.
|
||||
* Boards that provide audio clocks should override them.
|
||||
*/
|
||||
audio_clk_a: audio_clk_a {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
audio_clk_b: audio_clk_b {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
audio_clk_c: audio_clk_c {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
/* External SCIF clock */
|
||||
scif_clk: scif {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
/* External USB clock - can be overridden by the board */
|
||||
usb_extal_clk: usb_extal {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
/* External CAN clock */
|
||||
can_clk: can {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
cpg: clock-controller@e6150000 {
|
||||
compatible = "renesas,r8a7790-cpg-mssr";
|
||||
reg = <0 0xe6150000 0 0x1000>;
|
||||
|
|
@ -1302,7 +1259,8 @@ msiof3: spi@e6c90000 {
|
|||
};
|
||||
|
||||
xhci: usb@ee000000 {
|
||||
compatible = "renesas,xhci-r8a7790", "renesas,rcar-gen2-xhci";
|
||||
compatible = "renesas,xhci-r8a7790",
|
||||
"renesas,rcar-gen2-xhci";
|
||||
reg = <0 0xee000000 0 0xc00>;
|
||||
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&cpg CPG_MOD 328>;
|
||||
|
|
@ -1314,7 +1272,8 @@ xhci: usb@ee000000 {
|
|||
};
|
||||
|
||||
pci0: pci@ee090000 {
|
||||
compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
|
||||
compatible = "renesas,pci-r8a7790",
|
||||
"renesas,pci-rcar-gen2";
|
||||
device_type = "pci";
|
||||
reg = <0 0xee090000 0 0xc00>,
|
||||
<0 0xee080000 0 0x1100>;
|
||||
|
|
@ -1348,7 +1307,8 @@ usb@2,0 {
|
|||
};
|
||||
|
||||
pci1: pci@ee0b0000 {
|
||||
compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
|
||||
compatible = "renesas,pci-r8a7790",
|
||||
"renesas,pci-rcar-gen2";
|
||||
device_type = "pci";
|
||||
reg = <0 0xee0b0000 0 0xc00>,
|
||||
<0 0xee0a0000 0 0x1100>;
|
||||
|
|
@ -1370,7 +1330,8 @@ pci1: pci@ee0b0000 {
|
|||
};
|
||||
|
||||
pci2: pci@ee0d0000 {
|
||||
compatible = "renesas,pci-r8a7790", "renesas,pci-rcar-gen2";
|
||||
compatible = "renesas,pci-r8a7790",
|
||||
"renesas,pci-rcar-gen2";
|
||||
device_type = "pci";
|
||||
clocks = <&cpg CPG_MOD 703>;
|
||||
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
|
||||
|
|
@ -1404,7 +1365,8 @@ usb@2,0 {
|
|||
};
|
||||
|
||||
pciec: pcie@fe000000 {
|
||||
compatible = "renesas,pcie-r8a7790", "renesas,pcie-rcar-gen2";
|
||||
compatible = "renesas,pcie-r8a7790",
|
||||
"renesas,pcie-rcar-gen2";
|
||||
reg = <0 0xfe000000 0 0x80000>;
|
||||
#address-cells = <3>;
|
||||
#size-cells = <2>;
|
||||
|
|
@ -1463,22 +1425,27 @@ rcar_sound: sound@ec500000 {
|
|||
<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>,
|
||||
<&cpg CPG_CORE R8A7790_CLK_M2>;
|
||||
clock-names = "ssi-all",
|
||||
"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
|
||||
"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
|
||||
"src.9", "src.8", "src.7", "src.6", "src.5",
|
||||
"src.4", "src.3", "src.2", "src.1", "src.0",
|
||||
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
|
||||
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
|
||||
"ssi.1", "ssi.0",
|
||||
"src.9", "src.8", "src.7", "src.6",
|
||||
"src.5", "src.4", "src.3", "src.2",
|
||||
"src.1", "src.0",
|
||||
"ctu.0", "ctu.1",
|
||||
"mix.0", "mix.1",
|
||||
"dvc.0", "dvc.1",
|
||||
"clk_a", "clk_b", "clk_c", "clk_i";
|
||||
power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
|
||||
resets = <&cpg 1005>,
|
||||
<&cpg 1006>, <&cpg 1007>, <&cpg 1008>, <&cpg 1009>,
|
||||
<&cpg 1010>, <&cpg 1011>, <&cpg 1012>, <&cpg 1013>,
|
||||
<&cpg 1006>, <&cpg 1007>,
|
||||
<&cpg 1008>, <&cpg 1009>,
|
||||
<&cpg 1010>, <&cpg 1011>,
|
||||
<&cpg 1012>, <&cpg 1013>,
|
||||
<&cpg 1014>, <&cpg 1015>;
|
||||
reset-names = "ssi-all",
|
||||
"ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5",
|
||||
"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0";
|
||||
"ssi.9", "ssi.8", "ssi.7", "ssi.6",
|
||||
"ssi.5", "ssi.4", "ssi.3", "ssi.2",
|
||||
"ssi.1", "ssi.0";
|
||||
|
||||
status = "disabled";
|
||||
|
||||
|
|
@ -1565,59 +1532,70 @@ src9: src-9 {
|
|||
rcar_sound,ssi {
|
||||
ssi0: ssi-0 {
|
||||
interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
|
||||
dmas = <&audma0 0x01>, <&audma1 0x02>,
|
||||
<&audma0 0x15>, <&audma1 0x16>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi1: ssi-1 {
|
||||
interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
|
||||
dmas = <&audma0 0x03>, <&audma1 0x04>,
|
||||
<&audma0 0x49>, <&audma1 0x4a>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi2: ssi-2 {
|
||||
interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
|
||||
dmas = <&audma0 0x05>, <&audma1 0x06>,
|
||||
<&audma0 0x63>, <&audma1 0x64>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi3: ssi-3 {
|
||||
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
|
||||
dmas = <&audma0 0x07>, <&audma1 0x08>,
|
||||
<&audma0 0x6f>, <&audma1 0x70>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi4: ssi-4 {
|
||||
interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
|
||||
dmas = <&audma0 0x09>, <&audma1 0x0a>,
|
||||
<&audma0 0x71>, <&audma1 0x72>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi5: ssi-5 {
|
||||
interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
|
||||
dmas = <&audma0 0x0b>, <&audma1 0x0c>,
|
||||
<&audma0 0x73>, <&audma1 0x74>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi6: ssi-6 {
|
||||
interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
|
||||
dmas = <&audma0 0x0d>, <&audma1 0x0e>,
|
||||
<&audma0 0x75>, <&audma1 0x76>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi7: ssi-7 {
|
||||
interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
|
||||
dmas = <&audma0 0x0f>, <&audma1 0x10>,
|
||||
<&audma0 0x79>, <&audma1 0x7a>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi8: ssi-8 {
|
||||
interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
|
||||
dmas = <&audma0 0x11>, <&audma1 0x12>,
|
||||
<&audma0 0x7b>, <&audma1 0x7c>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
ssi9: ssi-9 {
|
||||
interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
|
||||
dmas = <&audma0 0x13>, <&audma1 0x14>,
|
||||
<&audma0 0x7d>, <&audma1 0x7e>;
|
||||
dma-names = "rx", "tx", "rxu", "txu";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ipmmu_sy0: mmu@e6280000 {
|
||||
compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6280000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 224 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
@ -1626,7 +1604,8 @@ ipmmu_sy0: mmu@e6280000 {
|
|||
};
|
||||
|
||||
ipmmu_sy1: mmu@e6290000 {
|
||||
compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6290000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
|
|
@ -1634,7 +1613,8 @@ ipmmu_sy1: mmu@e6290000 {
|
|||
};
|
||||
|
||||
ipmmu_ds: mmu@e6740000 {
|
||||
compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xe6740000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
@ -1643,7 +1623,8 @@ ipmmu_ds: mmu@e6740000 {
|
|||
};
|
||||
|
||||
ipmmu_mp: mmu@ec680000 {
|
||||
compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xec680000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
|
|
@ -1651,7 +1632,8 @@ ipmmu_mp: mmu@ec680000 {
|
|||
};
|
||||
|
||||
ipmmu_mx: mmu@fe951000 {
|
||||
compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xfe951000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 222 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 221 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
@ -1660,10 +1642,98 @@ ipmmu_mx: mmu@fe951000 {
|
|||
};
|
||||
|
||||
ipmmu_rt: mmu@ffc80000 {
|
||||
compatible = "renesas,ipmmu-r8a7790", "renesas,ipmmu-vmsa";
|
||||
compatible = "renesas,ipmmu-r8a7790",
|
||||
"renesas,ipmmu-vmsa";
|
||||
reg = <0 0xffc80000 0 0x1000>;
|
||||
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#iommu-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
|
||||
thermal-sensors = <&thermal>;
|
||||
|
||||
trips {
|
||||
cpu-crit {
|
||||
temperature = <95000>;
|
||||
hysteresis = <0>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
cooling-maps {
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
timer {
|
||||
compatible = "arm,armv7-timer";
|
||||
interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
|
||||
};
|
||||
|
||||
/* External root clock */
|
||||
extal_clk: extal {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
/* External PCIe clock - can be overridden by the board */
|
||||
pcie_bus_clk: pcie_bus {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
/*
|
||||
* The external audio clocks are configured as 0 Hz fixed frequency
|
||||
* clocks by default.
|
||||
* Boards that provide audio clocks should override them.
|
||||
*/
|
||||
audio_clk_a: audio_clk_a {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
audio_clk_b: audio_clk_b {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
audio_clk_c: audio_clk_c {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
/* External SCIF clock */
|
||||
scif_clk: scif {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
|
||||
/* External USB clock - can be overridden by the board */
|
||||
usb_extal_clk: usb_extal {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
/* External CAN clock */
|
||||
can_clk: can {
|
||||
compatible = "fixed-clock";
|
||||
#clock-cells = <0>;
|
||||
/* This value must be overridden by the board. */
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
Loading…
Reference in a new issue