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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
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spi: uniphier: switch to use modern name
Change legacy name master to modern name host or controller. No functional changed. Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://msgid.link/r/20231128093031.3707034-19-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Yang Yingliang
Mark Brown
parent
40daed1470
commit
4c2ee09910
1 changed files with 97 additions and 97 deletions
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@ -26,7 +26,7 @@ struct uniphier_spi_priv {
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void __iomem *base;
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dma_addr_t base_dma_addr;
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struct clk *clk;
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struct spi_master *master;
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struct spi_controller *host;
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struct completion xfer_done;
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int error;
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@ -127,7 +127,7 @@ static inline void uniphier_spi_irq_disable(struct uniphier_spi_priv *priv,
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static void uniphier_spi_set_mode(struct spi_device *spi)
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{
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struct uniphier_spi_priv *priv = spi_master_get_devdata(spi->master);
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struct uniphier_spi_priv *priv = spi_controller_get_devdata(spi->controller);
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u32 val1, val2;
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/*
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@ -180,7 +180,7 @@ static void uniphier_spi_set_mode(struct spi_device *spi)
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static void uniphier_spi_set_transfer_size(struct spi_device *spi, int size)
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{
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struct uniphier_spi_priv *priv = spi_master_get_devdata(spi->master);
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struct uniphier_spi_priv *priv = spi_controller_get_devdata(spi->controller);
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u32 val;
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val = readl(priv->base + SSI_TXWDS);
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@ -198,7 +198,7 @@ static void uniphier_spi_set_transfer_size(struct spi_device *spi, int size)
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static void uniphier_spi_set_baudrate(struct spi_device *spi,
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unsigned int speed)
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{
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struct uniphier_spi_priv *priv = spi_master_get_devdata(spi->master);
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struct uniphier_spi_priv *priv = spi_controller_get_devdata(spi->controller);
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u32 val, ckdiv;
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/*
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@ -217,7 +217,7 @@ static void uniphier_spi_set_baudrate(struct spi_device *spi,
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static void uniphier_spi_setup_transfer(struct spi_device *spi,
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struct spi_transfer *t)
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{
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struct uniphier_spi_priv *priv = spi_master_get_devdata(spi->master);
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struct uniphier_spi_priv *priv = spi_controller_get_devdata(spi->controller);
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u32 val;
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priv->error = 0;
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@ -333,7 +333,7 @@ static void uniphier_spi_fill_tx_fifo(struct uniphier_spi_priv *priv)
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static void uniphier_spi_set_cs(struct spi_device *spi, bool enable)
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{
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struct uniphier_spi_priv *priv = spi_master_get_devdata(spi->master);
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struct uniphier_spi_priv *priv = spi_controller_get_devdata(spi->controller);
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u32 val;
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val = readl(priv->base + SSI_FPS);
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@ -346,16 +346,16 @@ static void uniphier_spi_set_cs(struct spi_device *spi, bool enable)
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writel(val, priv->base + SSI_FPS);
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}
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static bool uniphier_spi_can_dma(struct spi_master *master,
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static bool uniphier_spi_can_dma(struct spi_controller *host,
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struct spi_device *spi,
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struct spi_transfer *t)
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{
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struct uniphier_spi_priv *priv = spi_master_get_devdata(master);
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struct uniphier_spi_priv *priv = spi_controller_get_devdata(host);
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unsigned int bpw = bytes_per_word(priv->bits_per_word);
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if ((!master->dma_tx && !master->dma_rx)
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|| (!master->dma_tx && t->tx_buf)
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|| (!master->dma_rx && t->rx_buf))
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if ((!host->dma_tx && !host->dma_rx)
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|| (!host->dma_tx && t->tx_buf)
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|| (!host->dma_rx && t->rx_buf))
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return false;
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return DIV_ROUND_UP(t->len, bpw) > SSI_FIFO_DEPTH;
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@ -363,33 +363,33 @@ static bool uniphier_spi_can_dma(struct spi_master *master,
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static void uniphier_spi_dma_rxcb(void *data)
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{
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struct spi_master *master = data;
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struct uniphier_spi_priv *priv = spi_master_get_devdata(master);
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struct spi_controller *host = data;
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struct uniphier_spi_priv *priv = spi_controller_get_devdata(host);
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int state = atomic_fetch_andnot(SSI_DMA_RX_BUSY, &priv->dma_busy);
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uniphier_spi_irq_disable(priv, SSI_IE_RXRE);
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if (!(state & SSI_DMA_TX_BUSY))
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spi_finalize_current_transfer(master);
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spi_finalize_current_transfer(host);
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}
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static void uniphier_spi_dma_txcb(void *data)
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{
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struct spi_master *master = data;
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struct uniphier_spi_priv *priv = spi_master_get_devdata(master);
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struct spi_controller *host = data;
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struct uniphier_spi_priv *priv = spi_controller_get_devdata(host);
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int state = atomic_fetch_andnot(SSI_DMA_TX_BUSY, &priv->dma_busy);
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uniphier_spi_irq_disable(priv, SSI_IE_TXRE);
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if (!(state & SSI_DMA_RX_BUSY))
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spi_finalize_current_transfer(master);
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spi_finalize_current_transfer(host);
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}
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static int uniphier_spi_transfer_one_dma(struct spi_master *master,
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static int uniphier_spi_transfer_one_dma(struct spi_controller *host,
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struct spi_device *spi,
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struct spi_transfer *t)
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{
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struct uniphier_spi_priv *priv = spi_master_get_devdata(master);
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struct uniphier_spi_priv *priv = spi_controller_get_devdata(host);
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struct dma_async_tx_descriptor *rxdesc = NULL, *txdesc = NULL;
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int buswidth;
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@ -412,23 +412,23 @@ static int uniphier_spi_transfer_one_dma(struct spi_master *master,
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.src_maxburst = SSI_FIFO_BURST_NUM,
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};
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dmaengine_slave_config(master->dma_rx, &rxconf);
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dmaengine_slave_config(host->dma_rx, &rxconf);
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rxdesc = dmaengine_prep_slave_sg(
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master->dma_rx,
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host->dma_rx,
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t->rx_sg.sgl, t->rx_sg.nents,
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DMA_DEV_TO_MEM, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!rxdesc)
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goto out_err_prep;
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rxdesc->callback = uniphier_spi_dma_rxcb;
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rxdesc->callback_param = master;
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rxdesc->callback_param = host;
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uniphier_spi_irq_enable(priv, SSI_IE_RXRE);
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atomic_or(SSI_DMA_RX_BUSY, &priv->dma_busy);
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dmaengine_submit(rxdesc);
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dma_async_issue_pending(master->dma_rx);
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dma_async_issue_pending(host->dma_rx);
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}
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if (priv->tx_buf) {
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@ -439,23 +439,23 @@ static int uniphier_spi_transfer_one_dma(struct spi_master *master,
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.dst_maxburst = SSI_FIFO_BURST_NUM,
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};
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dmaengine_slave_config(master->dma_tx, &txconf);
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dmaengine_slave_config(host->dma_tx, &txconf);
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txdesc = dmaengine_prep_slave_sg(
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master->dma_tx,
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host->dma_tx,
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t->tx_sg.sgl, t->tx_sg.nents,
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DMA_MEM_TO_DEV, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
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if (!txdesc)
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goto out_err_prep;
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txdesc->callback = uniphier_spi_dma_txcb;
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txdesc->callback_param = master;
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txdesc->callback_param = host;
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uniphier_spi_irq_enable(priv, SSI_IE_TXRE);
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atomic_or(SSI_DMA_TX_BUSY, &priv->dma_busy);
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dmaengine_submit(txdesc);
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dma_async_issue_pending(master->dma_tx);
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dma_async_issue_pending(host->dma_tx);
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}
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/* signal that we need to wait for completion */
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@ -463,17 +463,17 @@ static int uniphier_spi_transfer_one_dma(struct spi_master *master,
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out_err_prep:
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if (rxdesc)
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dmaengine_terminate_sync(master->dma_rx);
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dmaengine_terminate_sync(host->dma_rx);
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return -EINVAL;
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}
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static int uniphier_spi_transfer_one_irq(struct spi_master *master,
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static int uniphier_spi_transfer_one_irq(struct spi_controller *host,
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struct spi_device *spi,
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struct spi_transfer *t)
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{
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struct uniphier_spi_priv *priv = spi_master_get_devdata(master);
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struct device *dev = master->dev.parent;
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struct uniphier_spi_priv *priv = spi_controller_get_devdata(host);
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struct device *dev = host->dev.parent;
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unsigned long time_left;
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reinit_completion(&priv->xfer_done);
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@ -495,11 +495,11 @@ static int uniphier_spi_transfer_one_irq(struct spi_master *master,
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return priv->error;
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}
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static int uniphier_spi_transfer_one_poll(struct spi_master *master,
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static int uniphier_spi_transfer_one_poll(struct spi_controller *host,
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struct spi_device *spi,
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struct spi_transfer *t)
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{
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struct uniphier_spi_priv *priv = spi_master_get_devdata(master);
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struct uniphier_spi_priv *priv = spi_controller_get_devdata(host);
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int loop = SSI_POLL_TIMEOUT_US * 10;
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while (priv->tx_bytes) {
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@ -520,14 +520,14 @@ static int uniphier_spi_transfer_one_poll(struct spi_master *master,
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return 0;
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irq_transfer:
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return uniphier_spi_transfer_one_irq(master, spi, t);
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return uniphier_spi_transfer_one_irq(host, spi, t);
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}
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static int uniphier_spi_transfer_one(struct spi_master *master,
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static int uniphier_spi_transfer_one(struct spi_controller *host,
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struct spi_device *spi,
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struct spi_transfer *t)
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{
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struct uniphier_spi_priv *priv = spi_master_get_devdata(master);
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struct uniphier_spi_priv *priv = spi_controller_get_devdata(host);
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unsigned long threshold;
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bool use_dma;
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@ -537,9 +537,9 @@ static int uniphier_spi_transfer_one(struct spi_master *master,
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uniphier_spi_setup_transfer(spi, t);
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use_dma = master->can_dma ? master->can_dma(master, spi, t) : false;
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use_dma = host->can_dma ? host->can_dma(host, spi, t) : false;
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if (use_dma)
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return uniphier_spi_transfer_one_dma(master, spi, t);
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return uniphier_spi_transfer_one_dma(host, spi, t);
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/*
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* If the transfer operation will take longer than
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@ -548,33 +548,33 @@ static int uniphier_spi_transfer_one(struct spi_master *master,
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threshold = DIV_ROUND_UP(SSI_POLL_TIMEOUT_US * priv->speed_hz,
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USEC_PER_SEC * BITS_PER_BYTE);
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if (t->len > threshold)
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return uniphier_spi_transfer_one_irq(master, spi, t);
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return uniphier_spi_transfer_one_irq(host, spi, t);
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else
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return uniphier_spi_transfer_one_poll(master, spi, t);
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return uniphier_spi_transfer_one_poll(host, spi, t);
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}
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static int uniphier_spi_prepare_transfer_hardware(struct spi_master *master)
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static int uniphier_spi_prepare_transfer_hardware(struct spi_controller *host)
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{
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struct uniphier_spi_priv *priv = spi_master_get_devdata(master);
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struct uniphier_spi_priv *priv = spi_controller_get_devdata(host);
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writel(SSI_CTL_EN, priv->base + SSI_CTL);
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return 0;
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}
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static int uniphier_spi_unprepare_transfer_hardware(struct spi_master *master)
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static int uniphier_spi_unprepare_transfer_hardware(struct spi_controller *host)
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{
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struct uniphier_spi_priv *priv = spi_master_get_devdata(master);
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struct uniphier_spi_priv *priv = spi_controller_get_devdata(host);
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writel(0, priv->base + SSI_CTL);
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return 0;
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}
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static void uniphier_spi_handle_err(struct spi_master *master,
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static void uniphier_spi_handle_err(struct spi_controller *host,
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struct spi_message *msg)
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{
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struct uniphier_spi_priv *priv = spi_master_get_devdata(master);
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struct uniphier_spi_priv *priv = spi_controller_get_devdata(host);
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u32 val;
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/* stop running spi transfer */
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@ -587,12 +587,12 @@ static void uniphier_spi_handle_err(struct spi_master *master,
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uniphier_spi_irq_disable(priv, SSI_IE_ALL_MASK);
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if (atomic_read(&priv->dma_busy) & SSI_DMA_TX_BUSY) {
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dmaengine_terminate_async(master->dma_tx);
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dmaengine_terminate_async(host->dma_tx);
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atomic_andnot(SSI_DMA_TX_BUSY, &priv->dma_busy);
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}
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if (atomic_read(&priv->dma_busy) & SSI_DMA_RX_BUSY) {
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dmaengine_terminate_async(master->dma_rx);
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dmaengine_terminate_async(host->dma_rx);
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atomic_andnot(SSI_DMA_RX_BUSY, &priv->dma_busy);
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}
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}
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@ -641,7 +641,7 @@ static irqreturn_t uniphier_spi_handler(int irq, void *dev_id)
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static int uniphier_spi_probe(struct platform_device *pdev)
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{
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struct uniphier_spi_priv *priv;
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struct spi_master *master;
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struct spi_controller *host;
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struct resource *res;
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struct dma_slave_caps caps;
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u32 dma_tx_burst = 0, dma_rx_burst = 0;
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@ -649,20 +649,20 @@ static int uniphier_spi_probe(struct platform_device *pdev)
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int irq;
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int ret;
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master = spi_alloc_master(&pdev->dev, sizeof(*priv));
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if (!master)
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host = spi_alloc_host(&pdev->dev, sizeof(*priv));
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if (!host)
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return -ENOMEM;
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platform_set_drvdata(pdev, master);
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platform_set_drvdata(pdev, host);
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priv = spi_master_get_devdata(master);
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priv->master = master;
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priv = spi_controller_get_devdata(host);
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priv->host = host;
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priv->is_save_param = false;
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priv->base = devm_platform_get_and_ioremap_resource(pdev, 0, &res);
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if (IS_ERR(priv->base)) {
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ret = PTR_ERR(priv->base);
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goto out_master_put;
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goto out_host_put;
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}
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priv->base_dma_addr = res->start;
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@ -670,12 +670,12 @@ static int uniphier_spi_probe(struct platform_device *pdev)
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if (IS_ERR(priv->clk)) {
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dev_err(&pdev->dev, "failed to get clock\n");
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ret = PTR_ERR(priv->clk);
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goto out_master_put;
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goto out_host_put;
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}
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ret = clk_prepare_enable(priv->clk);
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if (ret)
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goto out_master_put;
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goto out_host_put;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0) {
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@ -694,35 +694,35 @@ static int uniphier_spi_probe(struct platform_device *pdev)
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clk_rate = clk_get_rate(priv->clk);
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master->max_speed_hz = DIV_ROUND_UP(clk_rate, SSI_MIN_CLK_DIVIDER);
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master->min_speed_hz = DIV_ROUND_UP(clk_rate, SSI_MAX_CLK_DIVIDER);
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master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
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master->dev.of_node = pdev->dev.of_node;
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master->bus_num = pdev->id;
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master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
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host->max_speed_hz = DIV_ROUND_UP(clk_rate, SSI_MIN_CLK_DIVIDER);
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host->min_speed_hz = DIV_ROUND_UP(clk_rate, SSI_MAX_CLK_DIVIDER);
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host->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_LSB_FIRST;
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host->dev.of_node = pdev->dev.of_node;
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host->bus_num = pdev->id;
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host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
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master->set_cs = uniphier_spi_set_cs;
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master->transfer_one = uniphier_spi_transfer_one;
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master->prepare_transfer_hardware
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host->set_cs = uniphier_spi_set_cs;
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host->transfer_one = uniphier_spi_transfer_one;
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host->prepare_transfer_hardware
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= uniphier_spi_prepare_transfer_hardware;
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master->unprepare_transfer_hardware
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host->unprepare_transfer_hardware
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= uniphier_spi_unprepare_transfer_hardware;
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master->handle_err = uniphier_spi_handle_err;
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master->can_dma = uniphier_spi_can_dma;
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host->handle_err = uniphier_spi_handle_err;
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host->can_dma = uniphier_spi_can_dma;
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master->num_chipselect = 1;
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master->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX;
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host->num_chipselect = 1;
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host->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX;
|
||||
|
||||
master->dma_tx = dma_request_chan(&pdev->dev, "tx");
|
||||
if (IS_ERR_OR_NULL(master->dma_tx)) {
|
||||
if (PTR_ERR(master->dma_tx) == -EPROBE_DEFER) {
|
||||
host->dma_tx = dma_request_chan(&pdev->dev, "tx");
|
||||
if (IS_ERR_OR_NULL(host->dma_tx)) {
|
||||
if (PTR_ERR(host->dma_tx) == -EPROBE_DEFER) {
|
||||
ret = -EPROBE_DEFER;
|
||||
goto out_disable_clk;
|
||||
}
|
||||
master->dma_tx = NULL;
|
||||
host->dma_tx = NULL;
|
||||
dma_tx_burst = INT_MAX;
|
||||
} else {
|
||||
ret = dma_get_slave_caps(master->dma_tx, &caps);
|
||||
ret = dma_get_slave_caps(host->dma_tx, &caps);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "failed to get TX DMA capacities: %d\n",
|
||||
ret);
|
||||
|
|
@ -731,16 +731,16 @@ static int uniphier_spi_probe(struct platform_device *pdev)
|
|||
dma_tx_burst = caps.max_burst;
|
||||
}
|
||||
|
||||
master->dma_rx = dma_request_chan(&pdev->dev, "rx");
|
||||
if (IS_ERR_OR_NULL(master->dma_rx)) {
|
||||
if (PTR_ERR(master->dma_rx) == -EPROBE_DEFER) {
|
||||
host->dma_rx = dma_request_chan(&pdev->dev, "rx");
|
||||
if (IS_ERR_OR_NULL(host->dma_rx)) {
|
||||
if (PTR_ERR(host->dma_rx) == -EPROBE_DEFER) {
|
||||
ret = -EPROBE_DEFER;
|
||||
goto out_release_dma;
|
||||
}
|
||||
master->dma_rx = NULL;
|
||||
host->dma_rx = NULL;
|
||||
dma_rx_burst = INT_MAX;
|
||||
} else {
|
||||
ret = dma_get_slave_caps(master->dma_rx, &caps);
|
||||
ret = dma_get_slave_caps(host->dma_rx, &caps);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "failed to get RX DMA capacities: %d\n",
|
||||
ret);
|
||||
|
|
@ -749,41 +749,41 @@ static int uniphier_spi_probe(struct platform_device *pdev)
|
|||
dma_rx_burst = caps.max_burst;
|
||||
}
|
||||
|
||||
master->max_dma_len = min(dma_tx_burst, dma_rx_burst);
|
||||
host->max_dma_len = min(dma_tx_burst, dma_rx_burst);
|
||||
|
||||
ret = devm_spi_register_master(&pdev->dev, master);
|
||||
ret = devm_spi_register_controller(&pdev->dev, host);
|
||||
if (ret)
|
||||
goto out_release_dma;
|
||||
|
||||
return 0;
|
||||
|
||||
out_release_dma:
|
||||
if (!IS_ERR_OR_NULL(master->dma_rx)) {
|
||||
dma_release_channel(master->dma_rx);
|
||||
master->dma_rx = NULL;
|
||||
if (!IS_ERR_OR_NULL(host->dma_rx)) {
|
||||
dma_release_channel(host->dma_rx);
|
||||
host->dma_rx = NULL;
|
||||
}
|
||||
if (!IS_ERR_OR_NULL(master->dma_tx)) {
|
||||
dma_release_channel(master->dma_tx);
|
||||
master->dma_tx = NULL;
|
||||
if (!IS_ERR_OR_NULL(host->dma_tx)) {
|
||||
dma_release_channel(host->dma_tx);
|
||||
host->dma_tx = NULL;
|
||||
}
|
||||
|
||||
out_disable_clk:
|
||||
clk_disable_unprepare(priv->clk);
|
||||
|
||||
out_master_put:
|
||||
spi_master_put(master);
|
||||
out_host_put:
|
||||
spi_controller_put(host);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void uniphier_spi_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct spi_master *master = platform_get_drvdata(pdev);
|
||||
struct uniphier_spi_priv *priv = spi_master_get_devdata(master);
|
||||
struct spi_controller *host = platform_get_drvdata(pdev);
|
||||
struct uniphier_spi_priv *priv = spi_controller_get_devdata(host);
|
||||
|
||||
if (master->dma_tx)
|
||||
dma_release_channel(master->dma_tx);
|
||||
if (master->dma_rx)
|
||||
dma_release_channel(master->dma_rx);
|
||||
if (host->dma_tx)
|
||||
dma_release_channel(host->dma_tx);
|
||||
if (host->dma_rx)
|
||||
dma_release_channel(host->dma_rx);
|
||||
|
||||
clk_disable_unprepare(priv->clk);
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in a new issue