ARM: tegra: trimslice: enable USB ports

Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Colin Cross <ccross@android.com>
This commit is contained in:
Mike Rapoport 2011-04-17 11:59:32 +03:00 committed by Colin Cross
parent 9504940ae0
commit 4c755997ea
3 changed files with 47 additions and 1 deletions

View file

@ -126,7 +126,7 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
{TEGRA_PINGROUP_SPIH, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_UAA, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_UAB, TEGRA_MUX_ULPI, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_UAC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_UAC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL},
{TEGRA_PINGROUP_UAD, TEGRA_MUX_IRDA, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_UCA, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
{TEGRA_PINGROUP_UCB, TEGRA_MUX_UARTC, TEGRA_PUPD_PULL_UP, TEGRA_TRI_TRISTATE},
@ -145,6 +145,9 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = {
static struct tegra_gpio_table gpio_table[] = {
{ .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */
{ .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */
{ .gpio = TRIMSLICE_GPIO_USB1_MODE, .enable = true }, /* USB1 mode */
{ .gpio = TRIMSLICE_GPIO_USB2_RST, .enable = true }, /* USB2 PHY rst */
};
void __init trimslice_pinmux_init(void)

View file

@ -25,6 +25,8 @@
#include <linux/io.h>
#include <linux/i2c.h>
#include <linux/i2c-tegra.h>
#include <linux/platform_data/tegra_usb.h>
#include <linux/gpio.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
@ -32,6 +34,8 @@
#include <mach/iomap.h>
#include <mach/sdhci.h>
#include <mach/usb_phy.h>
#include <mach/gpio.h>
#include "board.h"
#include "clock.h"
@ -123,6 +127,41 @@ static void trimslice_i2c_init(void)
ARRAY_SIZE(trimslice_i2c3_board_info));
}
struct tegra_ulpi_config ehci2_phy_config = {
.reset_gpio = TRIMSLICE_GPIO_USB2_RST,
.clk = "cdev2",
};
static struct tegra_ehci_platform_data ehci_ulpi_data = {
.operating_mode = TEGRA_USB_HOST,
.phy_config = &ehci2_phy_config,
};
static struct tegra_ehci_platform_data ehci_utmi_data = {
.operating_mode = TEGRA_USB_HOST,
};
static void trimslice_usb_init(void)
{
int err;
tegra_ehci3_device.dev.platform_data = &ehci_utmi_data;
platform_device_register(&tegra_ehci3_device);
tegra_ehci2_device.dev.platform_data = &ehci_ulpi_data;
platform_device_register(&tegra_ehci2_device);
err = gpio_request_one(TRIMSLICE_GPIO_USB1_MODE, GPIOF_OUT_INIT_HIGH,
"usb1mode");
if (err) {
pr_err("TrimSlice: failed to obtain USB1 mode gpio: %d\n", err);
return;
}
tegra_ehci1_device.dev.platform_data = &ehci_utmi_data;
platform_device_register(&tegra_ehci1_device);
}
static void __init tegra_trimslice_fixup(struct machine_desc *desc,
struct tag *tags, char **cmdline, struct meminfo *mi)
{
@ -164,6 +203,7 @@ static void __init tegra_trimslice_init(void)
platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
trimslice_i2c_init();
trimslice_usb_init();
}
MACHINE_START(TRIMSLICE, "trimslice")

View file

@ -20,6 +20,9 @@
#define TRIMSLICE_GPIO_SD4_CD TEGRA_GPIO_PP1 /* mmc4 cd */
#define TRIMSLICE_GPIO_SD4_WP TEGRA_GPIO_PP2 /* mmc4 wp */
#define TRIMSLICE_GPIO_USB1_MODE TEGRA_GPIO_PV2 /* USB1 mode */
#define TRIMSLICE_GPIO_USB2_RST TEGRA_GPIO_PV0 /* USB2 PHY reset */
void trimslice_pinmux_init(void);
#endif