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clk: exynos5433: Add documentation for the audio block parent clocks
Audio block requires access to two parent clocks: audio PLL and oscillator, so add this information to device tree bindings documentation. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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@ -104,6 +104,10 @@ Required Properties:
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- sclk_decon_tv_vclk_disp
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- aclk_disp_333
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Input clocks for audio clock controller:
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- oscclk
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- fout_aud_pll
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Input clocks for bus0 clock controller:
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- aclk_bus0_400
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@ -297,6 +301,9 @@ Example 2: Examples of clock controller nodes are listed below.
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compatible = "samsung,exynos5433-cmu-aud";
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reg = <0x114c0000 0x0b04>;
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#clock-cells = <1>;
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clock-names = "oscclk", "fout_aud_pll";
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clocks = <&xxti>, <&cmu_top CLK_FOUT_AUD_PLL>;
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};
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cmu_bus0: clock-controller@13600000 {
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