soc: qcom: dcc: Add driver support for Data Capture and Compare unit(DCC)

The DCC is a DMA Engine designed to capture and store data
during system crash or software triggers. The DCC operates
based on user inputs via the debugfs interface. The user gives
addresses as inputs and these addresses are stored in the
dcc sram. In case of a system crash or a manual software
trigger by the user through the debugfs interface,
the dcc captures and stores the values at these addresses.
This patch contains the driver which has all the methods
pertaining to the debugfs interface, auxiliary functions to
support all the four fundamental operations of dcc namely
read, write, read/modify/write and loop. The probe method
here instantiates all the resources necessary for dcc to
operate mainly the dedicated dcc sram where it stores the
values. The DCC driver can be used for debugging purposes
without going for a reboot since it can perform software
triggers as well based on user inputs.

Also add the documentation for debugfs entries which explains
the functionalities of each debugfs file that has been created
for dcc.

The following is the justification of using debugfs interface
over the other alternatives like sysfs/ioctls

i) As can be seen from the debugfs attribute descriptions,
some of the debugfs attribute files here contains multiple
arguments which needs to be accepted from the user. This goes
against the design style of sysfs.

ii) The user input patterns have been made simple and convenient
in this case with the use of debugfs interface as user doesn't
need to shuffle between different files to execute one instruction
as was the case on using other alternatives.

Signed-off-by: Souradeep Chowdhury <quic_schowdhu@quicinc.com>
Reviewed-by: Alex Elder <elder@linaro.org>
[bjorn: Fixed up a few indents and line wraps]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/644b4f66a358492a8a6738454035c3b120092fe7.1672148732.git.quic_schowdhu@quicinc.com

Documentation/ABI/testing/debugfs-driver-dcc

@@ -0,0 +1,98 @@
+What:           /sys/kernel/debug/dcc/.../ready
+Date:           December 2022
+Contact:        Souradeep Chowdhury <quic_schowdhu@quicinc.com>
+Description:
+		This file is used to check the status of the dcc
+		hardware if it's ready to take the inputs. A 'Y'
+		here indicates dcc is in a ready condition.
+		Example:
+		cat /sys/kernel/debug/dcc/.../ready
+
+What:           /sys/kernel/debug/dcc/.../trigger
+Date:           December 2022
+Contact:        Souradeep Chowdhury <quic_schowdhu@quicinc.com>
+Description:
+		This is the debugfs interface for manual software
+		triggers. The user can simply enter a 1 against
+		the debugfs file and enable a manual trigger.
+		Example:
+		echo  1 > /sys/kernel/debug/dcc/.../trigger
+
+What:           /sys/kernel/debug/dcc/.../config_reset
+Date:           December 2022
+Contact:        Souradeep Chowdhury <quic_schowdhu@quicinc.com>
+Description:
+		This file is used to reset the configuration of
+		a dcc driver to the default configuration. This
+		means that all the previous addresses stored in
+		the driver gets removed and user needs to enter
+		the address values from the start.
+		Example:
+		echo  1 > /sys/kernel/debug/dcc/../config_reset
+
+What:           /sys/kernel/debug/dcc/.../[list-number]/config
+Date:		 December 2022
+Contact:        Souradeep Chowdhury <quic_schowdhu@quicinc.com>
+Description:
+		This stores the addresses of the registers which
+		should be read in case of a hardware crash or
+		manual software triggers. The addresses entered here
+		are considered under all the 4 types of dcc
+		instructions Read type, Write type, Read Modify Write
+		type and Loop type. The lists need to be configured
+		sequentially and not in a overlapping manner. As an
+		example user can jump to list x only after list y is
+		configured and enabled. The format for entering all
+		types of instructions are explained in examples as
+		follows.
+		Example:
+	         i)Read Type Instruction
+		   echo R <1> <2> <3> >/sys/kernel/debug/dcc/../[list-number]/config
+		   1->Address to be considered for reading the value.
+		   2->The word count of the addresses, read n words
+		      starting from address <1>. Each word is of 32 bits.
+		      If not entered 1 is considered.
+		   3->Can be 'apb' or 'ahb' which indicates if it is apb or ahb
+		      bus respectively. If not entered ahb is considered.
+		ii)Write Type Instruction
+		   echo W <1> <2> <3> > /sys/kernel/debug/dcc/../[list-number]/config
+		   1->Address to be considered for writing the value.
+		   2->The value that needs to be written at the location.
+		   3->Can be a 'apb' or 'ahb' which indicates if it is apb or ahb
+		      but respectively.
+	       iii)Read Modify Write type instruction
+		   echo RW <1> <2> <3> > /sys/kernel/debug/dcc/../[list-number]/config
+		   1->The address which needs to be considered for read then write.
+		   2->The value that needs to be written on the address.
+		   3->The mask of the value to be written.
+		iv)Loop Type Instruction
+		   echo L <1> <2> <3> > /sys/kernel/debug/dcc/../[list-number]/config
+		   1->The loop count, the number of times the value of the addresses will be
+		      captured.
+		   2->The address count, total number of addresses to be entered in this
+		      instruction.
+		   3->The series of addresses to be entered separated by a space like <addr1>
+		      <addr2>... and so on.
+
+What:           /sys/kernel/debug/dcc/.../[list-number]/enable
+Date:           December 2022
+Contact:        Souradeep Chowdhury <quic_schowdhu@quicinc.com>
+Description:
+		This debugfs interface is used for enabling the
+		the dcc hardware. Enable file is kept under the
+		directory list number for which the user wants
+		to enable it. For example if the user wants to
+		enable list 1, then he should go for
+		echo 1 > /sys/kernel/debug/dcc/.../1/enable.
+		On enabling the dcc, all the addresses entered
+		by the user for the corresponding list is written
+		into dcc sram which is read by the dcc hardware
+		on manual or crash induced triggers. Lists should
+		be enabled sequentially.For example after configuring
+		addresses for list 1 and enabling it, a user can
+		proceed to enable list 2 or vice versa.
+		Example:
+		echo  0 > /sys/kernel/debug/dcc/.../[list-number]/enable
+		(disable dcc for the corresponding list number)
+		echo  1 > /sys/kernel/debug/dcc/.../[list-number]/enable
+		(enable dcc for the corresponding list number)

drivers/soc/qcom/Kconfig

@@ -70,6 +70,14 @@ config QCOM_LLCC
 	  SDM845. This provides interfaces to clients that use the LLCC.
 	  Say yes here to enable LLCC slice driver.
 
+config QCOM_DCC
+	tristate "Qualcomm Technologies, Inc. Data Capture and Compare(DCC) engine driver"
+	depends on ARCH_QCOM || COMPILE_TEST
+	help
+	  This option enables driver for Data Capture and Compare engine. DCC
+	  driver provides interface to configure DCC block and read back
+	  captured data from DCC's internal SRAM.
+
 config QCOM_KRYO_L2_ACCESSORS
 	bool
 	depends on ARCH_QCOM && ARM64 || COMPILE_TEST

drivers/soc/qcom/Makefile

@@ -4,6 +4,7 @@ obj-$(CONFIG_QCOM_AOSS_QMP) +=	qcom_aoss.o
 obj-$(CONFIG_QCOM_GENI_SE) +=	qcom-geni-se.o
 obj-$(CONFIG_QCOM_COMMAND_DB) += cmd-db.o
 obj-$(CONFIG_QCOM_CPR)		+= cpr.o
+obj-$(CONFIG_QCOM_DCC) += dcc.o
 obj-$(CONFIG_QCOM_GSBI)	+=	qcom_gsbi.o
 obj-$(CONFIG_QCOM_MDT_LOADER)	+= mdt_loader.o
 obj-$(CONFIG_QCOM_OCMEM)	+= ocmem.o