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PCI updates for v4.8:
Enumeration Mark Haswell Power Control Unit as having non-compliant BARs (Bjorn Helgaas) Power management Fix bridge_d3 update on device removal (Lukas Wunner) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJX2az0AAoJEFmIoMA60/r8/EoP/28mGRiKi8mlqNAR3MYN3F0n VSIm7WyxWNawH1gRJXKQBzNqgMJnj4qRGXSIvP3AIYyBDcJs/X7j91/eKOARNfQr 55A+gfSz4jUKlw+0WgPY8/U2/xQ4yoom1zhbsAYcIVeljZo/3JUg+wHpPjhIMkH0 2slTerHRDExrS43jxQi225toiEaO6lcY8EVmHCDo+jYlQz3sCEwIXg9hn1rwTbvG sJI0zyUwHF+oWowgJqlwYxsbPPnelPAN5YAx7KrHuVmBdL0Bgo3oIRtbb3JZZ9Up L9bQ6NpRjSARvijaZ2TAhueqIIDv2HGgvwNB01l4Yggw7Sm1dFCuUS6vj/e5tpZA xntE3F6s2Z+I4I1D7pAX3jMYCdYx/QltiTCeGRp8pJv+f4ewW3jcel3FAksY3BEg 0NCjDrGFqGYai4hGRROpt/aXlW/Pn53eQLlu4Xg2qgkj0NMh0ODMrTjMnABB39ae eGqIXab7WeVBxt10eU19J1u1RTqpUO2LJW+cMnvYdCfKAYby/gj8SD8vIsn3oDjZ hQS/4fSHurc7LZwDmwOfaiHlGnvcQWV9EKwgScS0v8AxPQnC8pNUgYpzZcXY8Q6I YXtyK7suFriSZPS0Qs4FrdfJrmTBaBQ55aZu9aftb5v4YqacN5qZo+HaXiONBy3v RzsFK6xIbnIgb35g8vKy =PQml -----END PGP SIGNATURE----- Merge tag 'pci-v4.8-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI fixes from Bjorn Helgaas: "Here are two changes for v4.8. The first fixes a "[Firmware Bug]: reg 0x10: invalid BAR (can't size)" warning on Haswell, and the second fixes a problem in some new runtime suspend functionality we merged for v4.8. Summary: Enumeration: Mark Haswell Power Control Unit as having non-compliant BARs (Bjorn Helgaas) Power management: Fix bridge_d3 update on device removal (Lukas Wunner)" * tag 'pci-v4.8-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: PCI: Fix bridge_d3 update on device removal PCI: Mark Haswell Power Control Unit as having non-compliant BARs
This commit is contained in:
commit
4cea877657
2 changed files with 14 additions and 9 deletions
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@ -553,15 +553,21 @@ static void twinhead_reserve_killing_zone(struct pci_dev *dev)
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x27B9, twinhead_reserve_killing_zone);
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DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x27B9, twinhead_reserve_killing_zone);
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/*
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/*
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* Broadwell EP Home Agent BARs erroneously return non-zero values when read.
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* Device [8086:2fc0]
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* Erratum HSE43
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* CONFIG_TDP_NOMINAL CSR Implemented at Incorrect Offset
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* http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v3-spec-update.html
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*
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*
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* See http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v4-spec-update.html
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* Devices [8086:6f60,6fa0,6fc0]
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* entry BDF2.
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* Erratum BDF2
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* PCI BARs in the Home Agent Will Return Non-Zero Values During Enumeration
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* http://www.intel.com/content/www/us/en/processors/xeon/xeon-e5-v4-spec-update.html
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*/
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*/
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static void pci_bdwep_bar(struct pci_dev *dev)
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static void pci_invalid_bar(struct pci_dev *dev)
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{
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{
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dev->non_compliant_bars = 1;
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dev->non_compliant_bars = 1;
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}
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}
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6f60, pci_bdwep_bar);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x2fc0, pci_invalid_bar);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6fa0, pci_bdwep_bar);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6f60, pci_invalid_bar);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6fc0, pci_bdwep_bar);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6fa0, pci_invalid_bar);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, 0x6fc0, pci_invalid_bar);
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@ -40,6 +40,7 @@ static void pci_destroy_dev(struct pci_dev *dev)
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list_del(&dev->bus_list);
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list_del(&dev->bus_list);
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up_write(&pci_bus_sem);
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up_write(&pci_bus_sem);
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pci_bridge_d3_device_removed(dev);
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pci_free_resources(dev);
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pci_free_resources(dev);
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put_device(&dev->dev);
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put_device(&dev->dev);
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}
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}
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@ -96,8 +97,6 @@ static void pci_remove_bus_device(struct pci_dev *dev)
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dev->subordinate = NULL;
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dev->subordinate = NULL;
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}
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}
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pci_bridge_d3_device_removed(dev);
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pci_destroy_dev(dev);
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pci_destroy_dev(dev);
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}
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}
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