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Merge branch 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev
* 'upstream-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jgarzik/libata-dev: ahci: redo stopping DMA engines on empty ports sata_sil24: fix kernel panic on ARM caused by unaligned access in sata_sil24 ahci: add pci quirk for JMB362 sata_via: explain the magic fix
This commit is contained in:
commit
4d3d769c60
5 changed files with 30 additions and 27 deletions
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@ -541,29 +541,11 @@ static int ahci_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
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return -EINVAL;
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}
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static int ahci_is_device_present(void __iomem *port_mmio)
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{
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u8 status = readl(port_mmio + PORT_TFDATA) & 0xff;
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/* Make sure PxTFD.STS.BSY and PxTFD.STS.DRQ are 0 */
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if (status & (ATA_BUSY | ATA_DRQ))
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return 0;
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/* Make sure PxSSTS.DET is 3h */
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status = readl(port_mmio + PORT_SCR_STAT) & 0xf;
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if (status != 3)
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return 0;
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return 1;
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}
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void ahci_start_engine(struct ata_port *ap)
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{
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void __iomem *port_mmio = ahci_port_base(ap);
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u32 tmp;
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if (!ahci_is_device_present(port_mmio))
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return;
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/* start DMA */
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tmp = readl(port_mmio + PORT_CMD);
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tmp |= PORT_CMD_START;
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@ -1892,6 +1874,9 @@ static void ahci_error_handler(struct ata_port *ap)
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}
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sata_pmp_error_handler(ap);
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if (!ata_dev_enabled(ap->link.device))
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ahci_stop_engine(ap);
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}
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static void ahci_post_internal_cmd(struct ata_queued_cmd *qc)
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@ -539,12 +539,12 @@ static void sil24_config_port(struct ata_port *ap)
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writel(PORT_CS_IRQ_WOC, port + PORT_CTRL_CLR);
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/* zero error counters. */
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writel(0x8000, port + PORT_DECODE_ERR_THRESH);
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writel(0x8000, port + PORT_CRC_ERR_THRESH);
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writel(0x8000, port + PORT_HSHK_ERR_THRESH);
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writel(0x0000, port + PORT_DECODE_ERR_CNT);
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writel(0x0000, port + PORT_CRC_ERR_CNT);
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writel(0x0000, port + PORT_HSHK_ERR_CNT);
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writew(0x8000, port + PORT_DECODE_ERR_THRESH);
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writew(0x8000, port + PORT_CRC_ERR_THRESH);
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writew(0x8000, port + PORT_HSHK_ERR_THRESH);
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writew(0x0000, port + PORT_DECODE_ERR_CNT);
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writew(0x0000, port + PORT_CRC_ERR_CNT);
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writew(0x0000, port + PORT_HSHK_ERR_CNT);
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/* always use 64bit activation */
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writel(PORT_CS_32BIT_ACTV, port + PORT_CTRL_CLR);
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@ -578,10 +578,24 @@ static void svia_configure(struct pci_dev *pdev)
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/*
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* vt6421 has problems talking to some drives. The following
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* is the magic fix from Joseph Chan <JosephChan@via.com.tw>.
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* Please add proper documentation if possible.
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* is the fix from Joseph Chan <JosephChan@via.com.tw>.
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*
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* When host issues HOLD, device may send up to 20DW of data
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* before acknowledging it with HOLDA and the host should be
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* able to buffer them in FIFO. Unfortunately, some WD drives
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* send upto 40DW before acknowledging HOLD and, in the
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* default configuration, this ends up overflowing vt6421's
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* FIFO, making the controller abort the transaction with
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* R_ERR.
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*
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* Rx52[2] is the internal 128DW FIFO Flow control watermark
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* adjusting mechanism enable bit and the default value 0
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* means host will issue HOLD to device when the left FIFO
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* size goes below 32DW. Setting it to 1 makes the watermark
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* 64DW.
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*
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* https://bugzilla.kernel.org/show_bug.cgi?id=15173
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* http://article.gmane.org/gmane.linux.ide/46352
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*/
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if (pdev->device == 0x3249) {
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pci_read_config_byte(pdev, 0x52, &tmp8);
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@ -1457,7 +1457,8 @@ static void quirk_jmicron_ata(struct pci_dev *pdev)
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conf5 &= ~(1 << 24); /* Clear bit 24 */
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switch (pdev->device) {
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case PCI_DEVICE_ID_JMICRON_JMB360:
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case PCI_DEVICE_ID_JMICRON_JMB360: /* SATA single port */
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case PCI_DEVICE_ID_JMICRON_JMB362: /* SATA dual ports */
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/* The controller should be in single function ahci mode */
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conf1 |= 0x0002A100; /* Set 8, 13, 15, 17 */
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break;
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@ -1493,12 +1494,14 @@ static void quirk_jmicron_ata(struct pci_dev *pdev)
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}
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB360, quirk_jmicron_ata);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, quirk_jmicron_ata);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB362, quirk_jmicron_ata);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, quirk_jmicron_ata);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, quirk_jmicron_ata);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, quirk_jmicron_ata);
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DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB368, quirk_jmicron_ata);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB360, quirk_jmicron_ata);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB361, quirk_jmicron_ata);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB362, quirk_jmicron_ata);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB363, quirk_jmicron_ata);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB365, quirk_jmicron_ata);
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DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_JMICRON, PCI_DEVICE_ID_JMICRON_JMB366, quirk_jmicron_ata);
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@ -2321,6 +2321,7 @@
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#define PCI_VENDOR_ID_JMICRON 0x197B
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#define PCI_DEVICE_ID_JMICRON_JMB360 0x2360
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#define PCI_DEVICE_ID_JMICRON_JMB361 0x2361
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#define PCI_DEVICE_ID_JMICRON_JMB362 0x2362
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#define PCI_DEVICE_ID_JMICRON_JMB363 0x2363
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#define PCI_DEVICE_ID_JMICRON_JMB365 0x2365
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#define PCI_DEVICE_ID_JMICRON_JMB366 0x2366
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