Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue

Tony Nguyen says:

====================
1GbE Intel Wired LAN Driver Updates 2021-02-03

This series contains updates to igc, igb, e1000e, and e1000 drivers.

Sasha adds counting of good transmit packets and reporting of NVM version
and gPHY version in ethtool firmware version. Replaces the use of strlcpy
to the preferred strscpy. Fixes a typo that caused the wrong register to be
output. He also removes an unused function pointer, some unneeded defines,
and a non-applicable comment. All changes for igc.

Gal Hammer fixes a typo which caused the RDBAL register values to be
shown instead of TDBAL for igb.

Nick Lowe enables RSS support for i211 devices for igb.

Tom Rix fixes checkpatch warning by removing h from printk format
specifier for igb.

Kaixu Xia removes setting of a variable that is overwritten before next
use for e1000e.

Sudip Mukherjee removes an unneeded assignment for e1000.

* '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/next-queue:
  e1000: drop unneeded assignment in e1000_set_itr()
  e1000e: remove the redundant value assignment in e1000_update_nvm_checksum_spt
  igb: remove h from printk format specifier
  igb: Enable RSS for Intel I211 Ethernet Controller
  igb: fix TDBAL register show incorrect value
  igc: Fix TDBAL register show incorrect value
  igc: Remove unused FUNC_1 mask
  igc: Remove unused local receiver mask
  igc: Prefer strscpy over strlcpy
  igc: Expose the gPHY firmware version
  igc: Expose the NVM version
  igc: Add Host Good Packets Transmitted Count
  igc: Remove MULR mask define
  igc: Remove igc_set_fw_version comment
  igc: Clean up nvm_operations structure
====================

Link: https://lore.kernel.org/r/20210204004259.3662059-1-anthony.l.nguyen@intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski 2021-02-04 21:26:27 -08:00
commit 4d469ec8ec
12 changed files with 48 additions and 21 deletions

View File

@ -2632,7 +2632,6 @@ static void e1000_set_itr(struct e1000_adapter *adapter)
/* for non-gigabit speeds, just fix the interrupt rate at 4000 */
if (unlikely(adapter->link_speed != SPEED_1000)) {
current_itr = 0;
new_itr = 4000;
goto set_itr_now;
}

View File

@ -3886,13 +3886,6 @@ static s32 e1000_update_nvm_checksum_spt(struct e1000_hw *hw)
if (ret_val)
goto release;
/* And invalidate the previously valid segment by setting
* its signature word (0x13) high_byte to 0b. This can be
* done without an erase because flash erase sets all bits
* to 1's. We can write 1's to 0's without an erase
*/
act_offset = (old_bank_offset + E1000_ICH_NVM_SIG_WORD) * 2 + 1;
/* offset in words but we read dword */
act_offset = old_bank_offset + E1000_ICH_NVM_SIG_WORD - 1;
ret_val = e1000_read_flash_dword_ich8lan(hw, act_offset, &dword);

View File

@ -316,7 +316,7 @@ static void igb_regdump(struct e1000_hw *hw, struct igb_reg_info *reginfo)
break;
case E1000_TDBAL(0):
for (n = 0; n < 4; n++)
regs[n] = rd32(E1000_RDBAL(n));
regs[n] = rd32(E1000_TDBAL(n));
break;
case E1000_TDBAH(0):
for (n = 0; n < 4; n++)
@ -3156,7 +3156,7 @@ static int igb_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
* the PCIe SR-IOV capability.
*/
if (pdev->is_virtfn) {
WARN(1, KERN_ERR "%s (%hx:%hx) should not be a VF!\n",
WARN(1, KERN_ERR "%s (%x:%x) should not be a VF!\n",
pci_name(pdev), pdev->vendor, pdev->device);
return -EINVAL;
}
@ -4482,8 +4482,7 @@ static void igb_setup_mrqc(struct igb_adapter *adapter)
else
mrqc |= E1000_MRQC_ENABLE_VMDQ;
} else {
if (hw->mac.type != e1000_i211)
mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
mrqc |= E1000_MRQC_ENABLE_RSS_MQ;
}
igb_vmm_control(adapter);

View File

@ -217,6 +217,8 @@ struct igc_adapter {
struct timecounter tc;
struct timespec64 prev_ptp_time; /* Pre-reset PTP clock */
ktime_t ptp_reset_start; /* Reset time in clock mono */
char fw_version[32];
};
void igc_up(struct igc_adapter *adapter);

View File

@ -129,7 +129,6 @@
/* 1000BASE-T Status Register */
#define SR_1000T_REMOTE_RX_STATUS 0x1000 /* Remote receiver OK */
#define SR_1000T_LOCAL_RX_STATUS 0x2000 /* Local receiver OK */
/* PHY GPY 211 registers */
#define STANDARD_AN_REG_MASK 0x0007 /* MMD */
@ -160,6 +159,7 @@
#define IGC_NVM_RW_REG_START 1 /* Start operation */
#define IGC_NVM_RW_ADDR_SHIFT 2 /* Shift to the address bits */
#define IGC_NVM_POLL_READ 0 /* Flag for polling for read complete */
#define IGC_NVM_DEV_STARTER 5 /* Dev_starter Version */
/* NVM Word Offsets */
#define NVM_CHECKSUM_REG 0x003F
@ -179,7 +179,6 @@
#define IGC_STATUS_LU 0x00000002 /* Link up.0=no,1=link */
#define IGC_STATUS_FUNC_MASK 0x0000000C /* PCI Function Mask */
#define IGC_STATUS_FUNC_SHIFT 2
#define IGC_STATUS_FUNC_1 0x00000004 /* Function 1 */
#define IGC_STATUS_TXOFF 0x00000010 /* transmission paused */
#define IGC_STATUS_SPEED_100 0x00000040 /* Speed 100Mb/s */
#define IGC_STATUS_SPEED_1000 0x00000080 /* Speed 1000Mb/s */
@ -284,7 +283,6 @@
#define IGC_TCTL_CT 0x00000ff0 /* collision threshold */
#define IGC_TCTL_COLD 0x003ff000 /* collision distance */
#define IGC_TCTL_RTLC 0x01000000 /* Re-transmit on late collision */
#define IGC_TCTL_MULR 0x10000000 /* Multiple request support */
/* Flow Control Constants */
#define FLOW_CONTROL_ADDRESS_LOW 0x00C28001

View File

@ -75,7 +75,7 @@ static void igc_regdump(struct igc_hw *hw, struct igc_reg_info *reginfo)
break;
case IGC_TDBAL(0):
for (n = 0; n < 4; n++)
regs[n] = rd32(IGC_RDBAL(n));
regs[n] = rd32(IGC_TDBAL(n));
break;
case IGC_TDBAH(0):
for (n = 0; n < 4; n++)

View File

@ -129,11 +129,28 @@ static void igc_ethtool_get_drvinfo(struct net_device *netdev,
struct ethtool_drvinfo *drvinfo)
{
struct igc_adapter *adapter = netdev_priv(netdev);
struct igc_hw *hw = &adapter->hw;
u16 nvm_version = 0;
u16 gphy_version;
strlcpy(drvinfo->driver, igc_driver_name, sizeof(drvinfo->driver));
strscpy(drvinfo->driver, igc_driver_name, sizeof(drvinfo->driver));
/* add fw_version here */
strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
/* NVM image version is reported as firmware version for i225 device */
hw->nvm.ops.read(hw, IGC_NVM_DEV_STARTER, 1, &nvm_version);
/* gPHY firmware version is reported as PHY FW version */
gphy_version = igc_read_phy_fw_version(hw);
scnprintf(adapter->fw_version,
sizeof(adapter->fw_version),
"%x:%x",
nvm_version,
gphy_version);
strscpy(drvinfo->fw_version, adapter->fw_version,
sizeof(drvinfo->fw_version));
strscpy(drvinfo->bus_info, pci_name(adapter->pdev),
sizeof(drvinfo->bus_info));
drvinfo->n_priv_flags = IGC_PRIV_FLAGS_STR_LEN;
@ -544,7 +561,6 @@ static int igc_ethtool_set_eeprom(struct net_device *netdev,
if (ret_val == 0)
hw->nvm.ops.update(hw);
/* check if need: igc_set_fw_version(adapter); */
kfree(eeprom_buff);
return ret_val;
}

View File

@ -113,7 +113,6 @@ struct igc_nvm_operations {
s32 (*write)(struct igc_hw *hw, u16 offset, u16 i, u16 *data);
s32 (*update)(struct igc_hw *hw);
s32 (*validate)(struct igc_hw *hw);
s32 (*valid_led_default)(struct igc_hw *hw, u16 *data);
};
struct igc_phy_operations {

View File

@ -3669,6 +3669,7 @@ void igc_update_stats(struct igc_adapter *adapter)
adapter->stats.prc1522 += rd32(IGC_PRC1522);
adapter->stats.tlpic += rd32(IGC_TLPIC);
adapter->stats.rlpic += rd32(IGC_RLPIC);
adapter->stats.hgptc += rd32(IGC_HGPTC);
mpc = rd32(IGC_MPC);
adapter->stats.mpc += mpc;

View File

@ -791,3 +791,21 @@ s32 igc_read_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 *data)
return ret_val;
}
/**
* igc_read_phy_fw_version - Read gPHY firmware version
* @hw: pointer to the HW structure
*/
u16 igc_read_phy_fw_version(struct igc_hw *hw)
{
struct igc_phy_info *phy = &hw->phy;
u16 gphy_version = 0;
u16 ret_val;
/* NVM image version is reported as firmware version for i225 device */
ret_val = phy->ops.read_reg(hw, IGC_GPHY_VERSION, &gphy_version);
if (ret_val)
hw_dbg("igc_phy: read wrong gphy version\n");
return gphy_version;
}

View File

@ -17,5 +17,6 @@ void igc_power_up_phy_copper(struct igc_hw *hw);
void igc_power_down_phy_copper(struct igc_hw *hw);
s32 igc_write_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 data);
s32 igc_read_phy_reg_gpy(struct igc_hw *hw, u32 offset, u16 *data);
u16 igc_read_phy_fw_version(struct igc_hw *hw);
#endif

View File

@ -13,6 +13,7 @@
#define IGC_MDICNFG 0x00E04 /* MDC/MDIO Configuration - RW */
#define IGC_CONNSW 0x00034 /* Copper/Fiber switch control - RW */
#define IGC_I225_PHPM 0x00E14 /* I225 PHY Power Management */
#define IGC_GPHY_VERSION 0x0001E /* I225 gPHY Firmware Version */
/* Internal Packet Buffer Size Registers */
#define IGC_RXPBS 0x02404 /* Rx Packet Buffer Size - RW */