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Merge branch 'icrc-counter' into rdma.git for-next
For dependencies, branch based on 'mellanox/mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox/linux.git Pull RoCE ICRC counters from Leon Romanovsky: ==================== This series exposes RoCE ICRC counter through existing RDMA hw_counters sysfs interface. The first patch has all HW definitions in mlx5_ifc.h file and second patch is the actual counter implementation. ==================== * branch 'icrc-counter': IB/mlx5: Support RoCE ICRC encapsulated error counter net/mlx5: Add RoCE RX ICRC encapsulated counter
This commit is contained in:
commit
4d7dff2b8b
5 changed files with 81 additions and 6 deletions
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@ -170,3 +170,15 @@ int mlx5_cmd_dealloc_memic(struct mlx5_memic *memic, u64 addr, u64 length)
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return err;
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return err;
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}
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}
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int mlx5_cmd_query_ext_ppcnt_counters(struct mlx5_core_dev *dev, void *out)
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{
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u32 in[MLX5_ST_SZ_DW(ppcnt_reg)] = {};
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int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
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MLX5_SET(ppcnt_reg, in, local_port, 1);
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MLX5_SET(ppcnt_reg, in, grp, MLX5_ETHERNET_EXTENDED_COUNTERS_GROUP);
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return mlx5_core_access_reg(dev, in, sz, out, sz, MLX5_REG_PPCNT,
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0, 0);
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}
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@ -40,6 +40,7 @@
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int mlx5_cmd_null_mkey(struct mlx5_core_dev *dev, u32 *null_mkey);
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int mlx5_cmd_null_mkey(struct mlx5_core_dev *dev, u32 *null_mkey);
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int mlx5_cmd_query_cong_params(struct mlx5_core_dev *dev, int cong_point,
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int mlx5_cmd_query_cong_params(struct mlx5_core_dev *dev, int cong_point,
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void *out, int out_size);
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void *out, int out_size);
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int mlx5_cmd_query_ext_ppcnt_counters(struct mlx5_core_dev *dev, void *out);
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int mlx5_cmd_modify_cong_params(struct mlx5_core_dev *mdev,
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int mlx5_cmd_modify_cong_params(struct mlx5_core_dev *mdev,
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void *in, int in_size);
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void *in, int in_size);
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int mlx5_cmd_alloc_memic(struct mlx5_memic *memic, phys_addr_t *addr,
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int mlx5_cmd_alloc_memic(struct mlx5_memic *memic, phys_addr_t *addr,
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@ -4677,6 +4677,15 @@ static const struct mlx5_ib_counter extended_err_cnts[] = {
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INIT_Q_COUNTER(req_cqe_flush_error),
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INIT_Q_COUNTER(req_cqe_flush_error),
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};
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};
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#define INIT_EXT_PPCNT_COUNTER(_name) \
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{ .name = #_name, .offset = \
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MLX5_BYTE_OFF(ppcnt_reg, \
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counter_set.eth_extended_cntrs_grp_data_layout._name##_high)}
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static const struct mlx5_ib_counter ext_ppcnt_cnts[] = {
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INIT_EXT_PPCNT_COUNTER(rx_icrc_encapsulated),
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};
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static void mlx5_ib_dealloc_counters(struct mlx5_ib_dev *dev)
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static void mlx5_ib_dealloc_counters(struct mlx5_ib_dev *dev)
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{
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{
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int i;
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int i;
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@ -4712,7 +4721,10 @@ static int __mlx5_ib_alloc_counters(struct mlx5_ib_dev *dev,
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cnts->num_cong_counters = ARRAY_SIZE(cong_cnts);
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cnts->num_cong_counters = ARRAY_SIZE(cong_cnts);
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num_counters += ARRAY_SIZE(cong_cnts);
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num_counters += ARRAY_SIZE(cong_cnts);
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}
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}
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if (MLX5_CAP_PCAM_FEATURE(dev->mdev, rx_icrc_encapsulated_counter)) {
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cnts->num_ext_ppcnt_counters = ARRAY_SIZE(ext_ppcnt_cnts);
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num_counters += ARRAY_SIZE(ext_ppcnt_cnts);
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}
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cnts->names = kcalloc(num_counters, sizeof(cnts->names), GFP_KERNEL);
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cnts->names = kcalloc(num_counters, sizeof(cnts->names), GFP_KERNEL);
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if (!cnts->names)
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if (!cnts->names)
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return -ENOMEM;
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return -ENOMEM;
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@ -4769,6 +4781,13 @@ static void mlx5_ib_fill_counters(struct mlx5_ib_dev *dev,
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offsets[j] = cong_cnts[i].offset;
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offsets[j] = cong_cnts[i].offset;
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}
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}
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}
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}
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if (MLX5_CAP_PCAM_FEATURE(dev->mdev, rx_icrc_encapsulated_counter)) {
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for (i = 0; i < ARRAY_SIZE(ext_ppcnt_cnts); i++, j++) {
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names[j] = ext_ppcnt_cnts[i].name;
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offsets[j] = ext_ppcnt_cnts[i].offset;
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}
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}
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}
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}
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static int mlx5_ib_alloc_counters(struct mlx5_ib_dev *dev)
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static int mlx5_ib_alloc_counters(struct mlx5_ib_dev *dev)
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@ -4814,7 +4833,8 @@ static struct rdma_hw_stats *mlx5_ib_alloc_hw_stats(struct ib_device *ibdev,
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return rdma_alloc_hw_stats_struct(port->cnts.names,
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return rdma_alloc_hw_stats_struct(port->cnts.names,
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port->cnts.num_q_counters +
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port->cnts.num_q_counters +
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port->cnts.num_cong_counters,
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port->cnts.num_cong_counters +
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port->cnts.num_ext_ppcnt_counters,
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RDMA_HW_STATS_DEFAULT_LIFESPAN);
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RDMA_HW_STATS_DEFAULT_LIFESPAN);
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}
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}
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@ -4847,6 +4867,34 @@ static int mlx5_ib_query_q_counters(struct mlx5_core_dev *mdev,
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return ret;
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return ret;
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}
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}
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static int mlx5_ib_query_ext_ppcnt_counters(struct mlx5_ib_dev *dev,
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struct mlx5_ib_port *port,
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struct rdma_hw_stats *stats)
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{
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int offset = port->cnts.num_q_counters + port->cnts.num_cong_counters;
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int sz = MLX5_ST_SZ_BYTES(ppcnt_reg);
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int ret, i;
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void *out;
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out = kvzalloc(sz, GFP_KERNEL);
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if (!out)
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return -ENOMEM;
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ret = mlx5_cmd_query_ext_ppcnt_counters(dev->mdev, out);
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if (ret)
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goto free;
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for (i = 0; i < port->cnts.num_ext_ppcnt_counters; i++) {
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stats->value[i + offset] =
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be64_to_cpup((__be64 *)(out +
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port->cnts.offsets[i + offset]));
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}
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free:
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kvfree(out);
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return ret;
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}
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static int mlx5_ib_get_hw_stats(struct ib_device *ibdev,
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static int mlx5_ib_get_hw_stats(struct ib_device *ibdev,
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struct rdma_hw_stats *stats,
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struct rdma_hw_stats *stats,
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u8 port_num, int index)
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u8 port_num, int index)
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@ -4860,13 +4908,21 @@ static int mlx5_ib_get_hw_stats(struct ib_device *ibdev,
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if (!stats)
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if (!stats)
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return -EINVAL;
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return -EINVAL;
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num_counters = port->cnts.num_q_counters + port->cnts.num_cong_counters;
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num_counters = port->cnts.num_q_counters +
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port->cnts.num_cong_counters +
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port->cnts.num_ext_ppcnt_counters;
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/* q_counters are per IB device, query the master mdev */
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/* q_counters are per IB device, query the master mdev */
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ret = mlx5_ib_query_q_counters(dev->mdev, port, stats);
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ret = mlx5_ib_query_q_counters(dev->mdev, port, stats);
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if (ret)
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if (ret)
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return ret;
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return ret;
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if (MLX5_CAP_PCAM_FEATURE(dev->mdev, rx_icrc_encapsulated_counter)) {
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ret = mlx5_ib_query_ext_ppcnt_counters(dev, port, stats);
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if (ret)
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return ret;
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}
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if (MLX5_CAP_GEN(dev->mdev, cc_query_allowed)) {
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if (MLX5_CAP_GEN(dev->mdev, cc_query_allowed)) {
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mdev = mlx5_ib_get_native_port_mdev(dev, port_num,
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mdev = mlx5_ib_get_native_port_mdev(dev, port_num,
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&mdev_port_num);
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&mdev_port_num);
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@ -666,6 +666,7 @@ struct mlx5_ib_counters {
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size_t *offsets;
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size_t *offsets;
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u32 num_q_counters;
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u32 num_q_counters;
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u32 num_cong_counters;
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u32 num_cong_counters;
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u32 num_ext_ppcnt_counters;
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u16 set_id;
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u16 set_id;
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bool set_id_valid;
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bool set_id_valid;
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};
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};
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@ -1685,7 +1685,11 @@ struct mlx5_ifc_eth_extended_cntrs_grp_data_layout_bits {
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u8 rx_buffer_full_low[0x20];
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u8 rx_buffer_full_low[0x20];
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u8 reserved_at_1c0[0x600];
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u8 rx_icrc_encapsulated_high[0x20];
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u8 rx_icrc_encapsulated_low[0x20];
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u8 reserved_at_200[0x5c0];
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};
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};
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struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
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struct mlx5_ifc_eth_3635_cntrs_grp_data_layout_bits {
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@ -8048,8 +8052,9 @@ struct mlx5_ifc_peir_reg_bits {
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};
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};
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struct mlx5_ifc_pcam_enhanced_features_bits {
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struct mlx5_ifc_pcam_enhanced_features_bits {
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u8 reserved_at_0[0x76];
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u8 reserved_at_0[0x6d];
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u8 rx_icrc_encapsulated_counter[0x1];
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u8 reserved_at_6e[0x8];
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u8 pfcc_mask[0x1];
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u8 pfcc_mask[0x1];
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u8 reserved_at_77[0x4];
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u8 reserved_at_77[0x4];
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u8 rx_buffer_fullness_counters[0x1];
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u8 rx_buffer_fullness_counters[0x1];
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