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https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git
synced 2024-08-21 08:19:28 +00:00
ARM: OMAP: DMA: Make channels dynamic for multi-boot
Make DMA channels dynamic for multi-boot Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
parent
4a79acdc78
commit
4d96372e6d
2 changed files with 44 additions and 25 deletions
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@ -72,7 +72,6 @@ struct omap_dma_lch {
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long flags;
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};
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#ifndef CONFIG_ARCH_OMAP1
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struct dma_link_info {
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int *linked_dmach_q;
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int no_of_lchs_linked;
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@ -86,7 +85,9 @@ struct dma_link_info {
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};
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static struct dma_link_info dma_linked_lch[OMAP_LOGICAL_DMA_CH_COUNT];
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static struct dma_link_info *dma_linked_lch;
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#ifndef CONFIG_ARCH_OMAP1
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/* Chain handling macros */
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#define OMAP_DMA_CHAIN_QINIT(chain_id) \
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@ -119,12 +120,14 @@ static struct dma_link_info dma_linked_lch[OMAP_LOGICAL_DMA_CH_COUNT];
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dma_linked_lch[chain_id].q_count++; \
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} while (0)
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#endif
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static int dma_lch_count;
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static int dma_chan_count;
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static spinlock_t dma_chan_lock;
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static struct omap_dma_lch dma_chan[OMAP_LOGICAL_DMA_CH_COUNT];
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static struct omap_dma_lch *dma_chan;
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static const u8 omap1_dma_irq[OMAP_LOGICAL_DMA_CH_COUNT] = {
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static const u8 omap1_dma_irq[OMAP1_LOGICAL_DMA_CH_COUNT] = {
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INT_DMA_CH0_6, INT_DMA_CH1_7, INT_DMA_CH2_8, INT_DMA_CH3,
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INT_DMA_CH4, INT_DMA_CH5, INT_1610_DMA_CH6, INT_1610_DMA_CH7,
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INT_1610_DMA_CH8, INT_1610_DMA_CH9, INT_1610_DMA_CH10,
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@ -727,7 +730,7 @@ omap_dma_set_prio_lch(int lch, unsigned char read_prio,
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{
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u32 w;
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if (unlikely((lch < 0 || lch >= OMAP_LOGICAL_DMA_CH_COUNT))) {
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if (unlikely((lch < 0 || lch >= dma_lch_count))) {
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printk(KERN_ERR "Invalid channel id\n");
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return -EINVAL;
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}
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@ -775,7 +778,7 @@ void omap_start_dma(int lch)
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{
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if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
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int next_lch, cur_lch;
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char dma_chan_link_map[OMAP_LOGICAL_DMA_CH_COUNT];
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char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT];
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dma_chan_link_map[lch] = 1;
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/* Set the link register of the first channel */
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@ -819,7 +822,7 @@ void omap_stop_dma(int lch)
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{
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if (!omap_dma_in_1510_mode() && dma_chan[lch].next_lch != -1) {
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int next_lch, cur_lch = lch;
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char dma_chan_link_map[OMAP_LOGICAL_DMA_CH_COUNT];
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char dma_chan_link_map[OMAP_DMA4_LOGICAL_DMA_CH_COUNT];
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memset(dma_chan_link_map, 0, sizeof(dma_chan_link_map));
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do {
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@ -1061,7 +1064,7 @@ int omap_request_dma_chain(int dev_id, const char *dev_name,
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}
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if (unlikely((no_of_chans < 1
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|| no_of_chans > OMAP_LOGICAL_DMA_CH_COUNT))) {
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|| no_of_chans > dma_lch_count))) {
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printk(KERN_ERR "Invalid Number of channels requested\n");
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return -EINVAL;
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}
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@ -1138,7 +1141,7 @@ int omap_modify_dma_chain_params(int chain_id,
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/* Check for input params */
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if (unlikely((chain_id < 0
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|| chain_id >= OMAP_LOGICAL_DMA_CH_COUNT))) {
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|| chain_id >= dma_lch_count))) {
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printk(KERN_ERR "Invalid chain id\n");
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return -EINVAL;
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}
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@ -1176,7 +1179,7 @@ int omap_free_dma_chain(int chain_id)
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u32 i;
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/* Check for input params */
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if (unlikely((chain_id < 0 || chain_id >= OMAP_LOGICAL_DMA_CH_COUNT))) {
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if (unlikely((chain_id < 0 || chain_id >= dma_lch_count))) {
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printk(KERN_ERR "Invalid chain id\n");
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return -EINVAL;
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}
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@ -1216,7 +1219,7 @@ EXPORT_SYMBOL(omap_free_dma_chain);
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int omap_dma_chain_status(int chain_id)
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{
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/* Check for input params */
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if (unlikely((chain_id < 0 || chain_id >= OMAP_LOGICAL_DMA_CH_COUNT))) {
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if (unlikely((chain_id < 0 || chain_id >= dma_lch_count))) {
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printk(KERN_ERR "Invalid chain id\n");
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return -EINVAL;
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}
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@ -1265,7 +1268,7 @@ int omap_dma_chain_a_transfer(int chain_id, int src_start, int dest_start,
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/* Check for input params */
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if (unlikely((chain_id < 0
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|| chain_id >= OMAP_LOGICAL_DMA_CH_COUNT))) {
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|| chain_id >= dma_lch_count))) {
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printk(KERN_ERR "Invalid chain id\n");
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return -EINVAL;
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}
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@ -1382,7 +1385,7 @@ int omap_start_dma_chain_transfers(int chain_id)
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int *channels;
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u32 w, i;
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if (unlikely((chain_id < 0 || chain_id >= OMAP_LOGICAL_DMA_CH_COUNT))) {
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if (unlikely((chain_id < 0 || chain_id >= dma_lch_count))) {
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printk(KERN_ERR "Invalid chain id\n");
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return -EINVAL;
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}
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@ -1435,7 +1438,7 @@ int omap_stop_dma_chain_transfers(int chain_id)
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u32 sys_cf;
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/* Check for input params */
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if (unlikely((chain_id < 0 || chain_id >= OMAP_LOGICAL_DMA_CH_COUNT))) {
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if (unlikely((chain_id < 0 || chain_id >= dma_lch_count))) {
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printk(KERN_ERR "Invalid chain id\n");
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return -EINVAL;
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}
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@ -1497,7 +1500,7 @@ int omap_get_dma_chain_index(int chain_id, int *ei, int *fi)
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int *channels;
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/* Check for input params */
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if (unlikely((chain_id < 0 || chain_id >= OMAP_LOGICAL_DMA_CH_COUNT))) {
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if (unlikely((chain_id < 0 || chain_id >= dma_lch_count))) {
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printk(KERN_ERR "Invalid chain id\n");
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return -EINVAL;
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}
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@ -1537,7 +1540,7 @@ int omap_get_dma_chain_dst_pos(int chain_id)
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int *channels;
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/* Check for input params */
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if (unlikely((chain_id < 0 || chain_id >= OMAP_LOGICAL_DMA_CH_COUNT))) {
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if (unlikely((chain_id < 0 || chain_id >= dma_lch_count))) {
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printk(KERN_ERR "Invalid chain id\n");
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return -EINVAL;
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}
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@ -1571,7 +1574,7 @@ int omap_get_dma_chain_src_pos(int chain_id)
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int *channels;
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/* Check for input params */
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if (unlikely((chain_id < 0 || chain_id >= OMAP_LOGICAL_DMA_CH_COUNT))) {
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if (unlikely((chain_id < 0 || chain_id >= dma_lch_count))) {
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printk(KERN_ERR "Invalid chain id\n");
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return -EINVAL;
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}
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@ -1724,7 +1727,7 @@ static irqreturn_t omap2_dma_irq_handler(int irq, void *dev_id)
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printk(KERN_WARNING "Spurious DMA IRQ\n");
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return IRQ_HANDLED;
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}
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for (i = 0; i < OMAP_LOGICAL_DMA_CH_COUNT && val != 0; i++) {
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for (i = 0; i < dma_lch_count && val != 0; i++) {
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if (val & 1)
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omap2_dma_handle_ch(i);
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val >>= 1;
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@ -2106,6 +2109,25 @@ static int __init omap_init_dma(void)
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{
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int ch, r;
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if (cpu_class_is_omap1())
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dma_lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
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else
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dma_lch_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
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dma_chan = kzalloc(sizeof(struct omap_dma_lch) * dma_lch_count,
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GFP_KERNEL);
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if (!dma_chan)
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return -ENOMEM;
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if (cpu_class_is_omap2()) {
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dma_linked_lch = kzalloc(sizeof(struct dma_link_info) *
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dma_lch_count, GFP_KERNEL);
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if (!dma_linked_lch) {
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kfree(dma_chan);
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return -ENOMEM;
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}
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}
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if (cpu_is_omap15xx()) {
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printk(KERN_INFO "DMA support for OMAP15xx initialized\n");
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dma_chan_count = 9;
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@ -2142,16 +2164,14 @@ static int __init omap_init_dma(void)
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u8 revision = omap_readb(OMAP_DMA4_REVISION);
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printk(KERN_INFO "OMAP DMA hardware revision %d.%d\n",
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revision >> 4, revision & 0xf);
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dma_chan_count = OMAP_LOGICAL_DMA_CH_COUNT;
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dma_chan_count = OMAP_DMA4_LOGICAL_DMA_CH_COUNT;
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} else {
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dma_chan_count = 0;
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return 0;
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}
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memset(&lcd_dma, 0, sizeof(lcd_dma));
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spin_lock_init(&lcd_dma.lock);
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spin_lock_init(&dma_chan_lock);
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memset(&dma_chan, 0, sizeof(dma_chan));
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for (ch = 0; ch < dma_chan_count; ch++) {
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omap_clear_dma(ch);
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@ -68,9 +68,10 @@
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#define OMAP_DMA4_CAPS_3 (OMAP_DMA4_BASE + 0x70)
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#define OMAP_DMA4_CAPS_4 (OMAP_DMA4_BASE + 0x74)
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#ifdef CONFIG_ARCH_OMAP1
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#define OMAP1_LOGICAL_DMA_CH_COUNT 17
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#define OMAP_DMA4_LOGICAL_DMA_CH_COUNT 32 /* REVISIT: Is this 32 + 2? */
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#define OMAP_LOGICAL_DMA_CH_COUNT 17
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#ifdef CONFIG_ARCH_OMAP1
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/* Common channel specific registers for omap1 */
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#define OMAP_DMA_CSDP_REG(n) __REG16(OMAP_DMA_BASE + 0x40 * (n) + 0x00)
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@ -89,8 +90,6 @@
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#else
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#define OMAP_LOGICAL_DMA_CH_COUNT 32 /* REVISIT: Is this 32 + 2? */
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/* Common channel specific registers for omap2 */
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#define OMAP_DMA_CCR_REG(n) __REG32(OMAP_DMA4_BASE + 0x60 * (n) + 0x80)
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#define OMAP_DMA_CLNK_CTRL_REG(n) __REG32(OMAP_DMA4_BASE + 0x60 * (n) + 0x84)
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