pci-v5.9-fixes-2

-----BEGIN PGP SIGNATURE-----
 
 iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAl93fEMUHGJoZWxnYWFz
 QGdvb2dsZS5jb20ACgkQWYigwDrT+vyuQw/9HLM3l2pDB+sFBBEu7V7qZRKVaesh
 t1+B2Y8TE+Fklav1Nmh75ctMZPsAiOs+A5fhJjcqEjQkWnptorQvJ9LbjGIW/J++
 STzFUMCsK03zug1b20/2Zd+iL6vAd4nS8kQEGybwO0hNPRllYiqPJe0CdFS/A+PI
 uwGKU9wdPJqSnnourbyY2XM1zplrI42l02O6YBwmDgvgbK0I397AWFJxENNfCNFA
 C8HaMN0qGbnYv/UhFwb5An1VpRZ0zL4wnwr24mRAlHLN+eLoUZwQ0JfmAbqJSsfH
 6ynFLYGCkBLIDhlJkvHxiROxfzc7XT59pTL82pPqm3+dtAVsG09zWizAQRXKESi3
 MkU8ohlHE50J2JNvGepuEsop5DGtIaW3yO7vxKujp1/LC67HX9Jdaf2Ojd2euy45
 njVer28Rhjc4OkkElhDQ4TfOalVE+5TwsjXlmJgM7MmvHIuyXQzSYYDhEmJ/pUlx
 ecn+OHNdOmCmlodV/43jyBUpwGCixkglN/ZV3+cVaReSkSinNIngy7963Pef+kLD
 mTYc3VpLPSnQ5U+cer2j41fEG7MJ1keS+kePUMmZO7UCjPF8pgDqdDD+/eL97tb7
 NFw74rKmhdXRooJIJPhlB5oxt15NNC9ij4s5VzXygUsBdj+X3di6g31IOwF32V1P
 aEFpY9gEMiUtw+c=
 =PtpT
 -----END PGP SIGNATURE-----

Merge tag 'pci-v5.9-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI fixes from Bjorn Helgaas:

 - Fix rockchip regression in rockchip_pcie_valid_device() (Lorenzo
   Pieralisi)

 - Add Pali Rohár as aardvark PCI maintainer (Pali Rohár)

* tag 'pci-v5.9-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci:
  MAINTAINERS: Add Pali Rohár as aardvark PCI maintainer
  PCI: rockchip: Fix bus checks in rockchip_pcie_valid_device()
This commit is contained in:
Linus Torvalds 2020-10-02 14:48:25 -07:00
commit 4d9c3a688a
2 changed files with 5 additions and 7 deletions

View file

@ -13182,6 +13182,7 @@ F: drivers/firmware/pcdp.*
PCI DRIVER FOR AARDVARK (Marvell Armada 3700)
M: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
M: Pali Rohár <pali@kernel.org>
L: linux-pci@vger.kernel.org
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
S: Maintained

View file

@ -71,16 +71,13 @@ static void rockchip_pcie_update_txcredit_mui(struct rockchip_pcie *rockchip)
static int rockchip_pcie_valid_device(struct rockchip_pcie *rockchip,
struct pci_bus *bus, int dev)
{
/* access only one slot on each root port */
if (pci_is_root_bus(bus) && dev > 0)
return 0;
/*
* do not read more than one device on the bus directly attached
* Access only one slot on each root port.
* Do not read more than one device on the bus directly attached
* to RC's downstream side.
*/
if (pci_is_root_bus(bus->parent) && dev > 0)
return 0;
if (pci_is_root_bus(bus) || pci_is_root_bus(bus->parent))
return dev == 0;
return 1;
}