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bpf, mips64: remove ld_abs/ld_ind
Since LD_ABS/LD_IND instructions are now removed from the core and reimplemented through a combination of inlined BPF instructions and a slow-path helper, we can get rid of the complexity from mips64 JIT. Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Alexei Starovoitov <ast@kernel.org> Signed-off-by: Alexei Starovoitov <ast@kernel.org>
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0d2d0cedc0
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1 changed files with 0 additions and 104 deletions
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@ -1267,110 +1267,6 @@ static int build_one_insn(const struct bpf_insn *insn, struct jit_ctx *ctx,
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return -EINVAL;
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break;
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case BPF_LD | BPF_B | BPF_ABS:
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case BPF_LD | BPF_H | BPF_ABS:
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case BPF_LD | BPF_W | BPF_ABS:
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case BPF_LD | BPF_DW | BPF_ABS:
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ctx->flags |= EBPF_SAVE_RA;
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gen_imm_to_reg(insn, MIPS_R_A1, ctx);
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emit_instr(ctx, addiu, MIPS_R_A2, MIPS_R_ZERO, size_to_len(insn));
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if (insn->imm < 0) {
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emit_const_to_reg(ctx, MIPS_R_T9, (u64)bpf_internal_load_pointer_neg_helper);
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} else {
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emit_const_to_reg(ctx, MIPS_R_T9, (u64)ool_skb_header_pointer);
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emit_instr(ctx, daddiu, MIPS_R_A3, MIPS_R_SP, ctx->tmp_offset);
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}
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goto ld_skb_common;
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case BPF_LD | BPF_B | BPF_IND:
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case BPF_LD | BPF_H | BPF_IND:
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case BPF_LD | BPF_W | BPF_IND:
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case BPF_LD | BPF_DW | BPF_IND:
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ctx->flags |= EBPF_SAVE_RA;
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src = ebpf_to_mips_reg(ctx, insn, src_reg_no_fp);
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if (src < 0)
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return src;
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ts = get_reg_val_type(ctx, this_idx, insn->src_reg);
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if (ts == REG_32BIT_ZERO_EX) {
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/* sign extend */
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emit_instr(ctx, sll, MIPS_R_A1, src, 0);
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src = MIPS_R_A1;
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}
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if (insn->imm >= S16_MIN && insn->imm <= S16_MAX) {
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emit_instr(ctx, daddiu, MIPS_R_A1, src, insn->imm);
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} else {
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gen_imm_to_reg(insn, MIPS_R_AT, ctx);
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emit_instr(ctx, daddu, MIPS_R_A1, MIPS_R_AT, src);
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}
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/* truncate to 32-bit int */
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emit_instr(ctx, sll, MIPS_R_A1, MIPS_R_A1, 0);
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emit_instr(ctx, daddiu, MIPS_R_A3, MIPS_R_SP, ctx->tmp_offset);
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emit_instr(ctx, slt, MIPS_R_AT, MIPS_R_A1, MIPS_R_ZERO);
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emit_const_to_reg(ctx, MIPS_R_T8, (u64)bpf_internal_load_pointer_neg_helper);
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emit_const_to_reg(ctx, MIPS_R_T9, (u64)ool_skb_header_pointer);
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emit_instr(ctx, addiu, MIPS_R_A2, MIPS_R_ZERO, size_to_len(insn));
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emit_instr(ctx, movn, MIPS_R_T9, MIPS_R_T8, MIPS_R_AT);
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ld_skb_common:
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emit_instr(ctx, jalr, MIPS_R_RA, MIPS_R_T9);
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/* delay slot move */
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emit_instr(ctx, daddu, MIPS_R_A0, MIPS_R_S0, MIPS_R_ZERO);
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/* Check the error value */
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b_off = b_imm(exit_idx, ctx);
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if (is_bad_offset(b_off)) {
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target = j_target(ctx, exit_idx);
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if (target == (unsigned int)-1)
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return -E2BIG;
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if (!(ctx->offsets[this_idx] & OFFSETS_B_CONV)) {
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ctx->offsets[this_idx] |= OFFSETS_B_CONV;
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ctx->long_b_conversion = 1;
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}
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emit_instr(ctx, bne, MIPS_R_V0, MIPS_R_ZERO, 4 * 3);
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emit_instr(ctx, nop);
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emit_instr(ctx, j, target);
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emit_instr(ctx, nop);
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} else {
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emit_instr(ctx, beq, MIPS_R_V0, MIPS_R_ZERO, b_off);
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emit_instr(ctx, nop);
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}
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#ifdef __BIG_ENDIAN
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need_swap = false;
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#else
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need_swap = true;
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#endif
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dst = MIPS_R_V0;
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switch (BPF_SIZE(insn->code)) {
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case BPF_B:
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emit_instr(ctx, lbu, dst, 0, MIPS_R_V0);
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break;
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case BPF_H:
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emit_instr(ctx, lhu, dst, 0, MIPS_R_V0);
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if (need_swap)
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emit_instr(ctx, wsbh, dst, dst);
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break;
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case BPF_W:
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emit_instr(ctx, lw, dst, 0, MIPS_R_V0);
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if (need_swap) {
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emit_instr(ctx, wsbh, dst, dst);
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emit_instr(ctx, rotr, dst, dst, 16);
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}
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break;
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case BPF_DW:
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emit_instr(ctx, ld, dst, 0, MIPS_R_V0);
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if (need_swap) {
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emit_instr(ctx, dsbh, dst, dst);
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emit_instr(ctx, dshd, dst, dst);
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}
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break;
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}
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break;
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case BPF_ALU | BPF_END | BPF_FROM_BE:
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case BPF_ALU | BPF_END | BPF_FROM_LE:
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dst = ebpf_to_mips_reg(ctx, insn, dst_reg);
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