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ASoC: SOF: amd: increase DSP cache window range
Increase DSP cache window range to 2.5MB to align with ACP memory. Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20231020062822.3913760-3-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
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#define EXCEPT_MAX_HDR_SIZE 0x400
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#define AMD_STACK_DUMP_SIZE 32
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#define SRAM1_SIZE 0x13A000
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#define SRAM1_SIZE 0x280000
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#define PROBE_STATUS_BIT BIT(31)
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#define ACP_FIRMWARE_SIGNATURE 0x100
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