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spi: bcm-qspi: when tx/rx buffer is NULL set to 0
Currently we set the tx/rx buffer to 0xff when NULL. This causes
problems with some spi slaves where 0xff is a valid command. Looking
at other drivers, the tx/rx buffer is usually set to 0x00 when NULL.
Following this convention solves the issue.
Fixes: fa236a7ef2
("spi: bcm-qspi: Add Broadcom MSPI driver")
Signed-off-by: Justin Chen <justinpopo6@gmail.com>
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200420190853.45614-6-kdasu.kdev@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
parent
1b7ad8c405
commit
4df3bea7f9
1 changed files with 4 additions and 4 deletions
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@ -666,7 +666,7 @@ static void read_from_hw(struct bcm_qspi *qspi, int slots)
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if (buf)
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if (buf)
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buf[tp.byte] = read_rxram_slot_u8(qspi, slot);
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buf[tp.byte] = read_rxram_slot_u8(qspi, slot);
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dev_dbg(&qspi->pdev->dev, "RD %02x\n",
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dev_dbg(&qspi->pdev->dev, "RD %02x\n",
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buf ? buf[tp.byte] : 0xff);
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buf ? buf[tp.byte] : 0x0);
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} else {
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} else {
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u16 *buf = tp.trans->rx_buf;
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u16 *buf = tp.trans->rx_buf;
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@ -674,7 +674,7 @@ static void read_from_hw(struct bcm_qspi *qspi, int slots)
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buf[tp.byte / 2] = read_rxram_slot_u16(qspi,
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buf[tp.byte / 2] = read_rxram_slot_u16(qspi,
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slot);
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slot);
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dev_dbg(&qspi->pdev->dev, "RD %04x\n",
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dev_dbg(&qspi->pdev->dev, "RD %04x\n",
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buf ? buf[tp.byte] : 0xffff);
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buf ? buf[tp.byte / 2] : 0x0);
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}
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}
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update_qspi_trans_byte_count(qspi, &tp,
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update_qspi_trans_byte_count(qspi, &tp,
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@ -729,13 +729,13 @@ static int write_to_hw(struct bcm_qspi *qspi, struct spi_device *spi)
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while (!tstatus && slot < MSPI_NUM_CDRAM) {
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while (!tstatus && slot < MSPI_NUM_CDRAM) {
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if (tp.trans->bits_per_word <= 8) {
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if (tp.trans->bits_per_word <= 8) {
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const u8 *buf = tp.trans->tx_buf;
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const u8 *buf = tp.trans->tx_buf;
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u8 val = buf ? buf[tp.byte] : 0xff;
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u8 val = buf ? buf[tp.byte] : 0x00;
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write_txram_slot_u8(qspi, slot, val);
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write_txram_slot_u8(qspi, slot, val);
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dev_dbg(&qspi->pdev->dev, "WR %02x\n", val);
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dev_dbg(&qspi->pdev->dev, "WR %02x\n", val);
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} else {
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} else {
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const u16 *buf = tp.trans->tx_buf;
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const u16 *buf = tp.trans->tx_buf;
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u16 val = buf ? buf[tp.byte / 2] : 0xffff;
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u16 val = buf ? buf[tp.byte / 2] : 0x0000;
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write_txram_slot_u16(qspi, slot, val);
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write_txram_slot_u16(qspi, slot, val);
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dev_dbg(&qspi->pdev->dev, "WR %04x\n", val);
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dev_dbg(&qspi->pdev->dev, "WR %04x\n", val);
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