spi: bcm-qspi: when tx/rx buffer is NULL set to 0

Currently we set the tx/rx buffer to 0xff when NULL. This causes
problems with some spi slaves where 0xff is a valid command. Looking
at other drivers, the tx/rx buffer is usually set to 0x00 when NULL.
Following this convention solves the issue.

Fixes: fa236a7ef2 ("spi: bcm-qspi: Add Broadcom MSPI driver")
Signed-off-by: Justin Chen <justinpopo6@gmail.com>
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20200420190853.45614-6-kdasu.kdev@gmail.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Justin Chen 2020-04-20 15:08:49 -04:00 committed by Mark Brown
parent 1b7ad8c405
commit 4df3bea7f9
No known key found for this signature in database
GPG key ID: 24D68B725D5487D0

View file

@ -666,7 +666,7 @@ static void read_from_hw(struct bcm_qspi *qspi, int slots)
if (buf) if (buf)
buf[tp.byte] = read_rxram_slot_u8(qspi, slot); buf[tp.byte] = read_rxram_slot_u8(qspi, slot);
dev_dbg(&qspi->pdev->dev, "RD %02x\n", dev_dbg(&qspi->pdev->dev, "RD %02x\n",
buf ? buf[tp.byte] : 0xff); buf ? buf[tp.byte] : 0x0);
} else { } else {
u16 *buf = tp.trans->rx_buf; u16 *buf = tp.trans->rx_buf;
@ -674,7 +674,7 @@ static void read_from_hw(struct bcm_qspi *qspi, int slots)
buf[tp.byte / 2] = read_rxram_slot_u16(qspi, buf[tp.byte / 2] = read_rxram_slot_u16(qspi,
slot); slot);
dev_dbg(&qspi->pdev->dev, "RD %04x\n", dev_dbg(&qspi->pdev->dev, "RD %04x\n",
buf ? buf[tp.byte] : 0xffff); buf ? buf[tp.byte / 2] : 0x0);
} }
update_qspi_trans_byte_count(qspi, &tp, update_qspi_trans_byte_count(qspi, &tp,
@ -729,13 +729,13 @@ static int write_to_hw(struct bcm_qspi *qspi, struct spi_device *spi)
while (!tstatus && slot < MSPI_NUM_CDRAM) { while (!tstatus && slot < MSPI_NUM_CDRAM) {
if (tp.trans->bits_per_word <= 8) { if (tp.trans->bits_per_word <= 8) {
const u8 *buf = tp.trans->tx_buf; const u8 *buf = tp.trans->tx_buf;
u8 val = buf ? buf[tp.byte] : 0xff; u8 val = buf ? buf[tp.byte] : 0x00;
write_txram_slot_u8(qspi, slot, val); write_txram_slot_u8(qspi, slot, val);
dev_dbg(&qspi->pdev->dev, "WR %02x\n", val); dev_dbg(&qspi->pdev->dev, "WR %02x\n", val);
} else { } else {
const u16 *buf = tp.trans->tx_buf; const u16 *buf = tp.trans->tx_buf;
u16 val = buf ? buf[tp.byte / 2] : 0xffff; u16 val = buf ? buf[tp.byte / 2] : 0x0000;
write_txram_slot_u16(qspi, slot, val); write_txram_slot_u16(qspi, slot, val);
dev_dbg(&qspi->pdev->dev, "WR %04x\n", val); dev_dbg(&qspi->pdev->dev, "WR %04x\n", val);