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synced 2024-08-26 10:49:33 +00:00
mmc: dw_mmc: modify DATA register offset
In dw_mmc 2.40a spec, Data register's offset is changed. Before we used Data register offset 0x100. but if somebody uses a 2.40a controller, we must use 0x200 for Data register. This patch adds a version-id checking point and uses SDMMC_DATA(x) instead of SDMMC_DATA. It assumes 2.40a is the latest version. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: James Hogan <james.hogan@imgtec.com> Signed-off-by: Chris Ball <cjb@laptop.org>
This commit is contained in:
parent
c43fd77466
commit
4e0a5adf46
3 changed files with 61 additions and 22 deletions
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@ -1043,7 +1043,8 @@ static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt)
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buf += len;
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buf += len;
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cnt -= len;
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cnt -= len;
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if (!sg_next(host->sg) || host->part_buf_count == 2) {
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if (!sg_next(host->sg) || host->part_buf_count == 2) {
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mci_writew(host, DATA, host->part_buf16);
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mci_writew(host, DATA(host->data_offset),
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host->part_buf16);
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host->part_buf_count = 0;
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host->part_buf_count = 0;
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}
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}
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}
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}
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@ -1060,21 +1061,23 @@ static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt)
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cnt -= len;
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cnt -= len;
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/* push data from aligned buffer into fifo */
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/* push data from aligned buffer into fifo */
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for (i = 0; i < items; ++i)
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for (i = 0; i < items; ++i)
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mci_writew(host, DATA, aligned_buf[i]);
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mci_writew(host, DATA(host->data_offset),
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aligned_buf[i]);
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}
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}
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} else
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} else
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#endif
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#endif
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{
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{
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u16 *pdata = buf;
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u16 *pdata = buf;
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for (; cnt >= 2; cnt -= 2)
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for (; cnt >= 2; cnt -= 2)
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mci_writew(host, DATA, *pdata++);
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mci_writew(host, DATA(host->data_offset), *pdata++);
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buf = pdata;
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buf = pdata;
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}
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}
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/* put anything remaining in the part_buf */
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/* put anything remaining in the part_buf */
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if (cnt) {
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if (cnt) {
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dw_mci_set_part_bytes(host, buf, cnt);
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dw_mci_set_part_bytes(host, buf, cnt);
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if (!sg_next(host->sg))
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if (!sg_next(host->sg))
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mci_writew(host, DATA, host->part_buf16);
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mci_writew(host, DATA(host->data_offset),
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host->part_buf16);
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}
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}
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}
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}
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@ -1089,7 +1092,8 @@ static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt)
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int items = len >> 1;
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int items = len >> 1;
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int i;
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int i;
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for (i = 0; i < items; ++i)
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for (i = 0; i < items; ++i)
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aligned_buf[i] = mci_readw(host, DATA);
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aligned_buf[i] = mci_readw(host,
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DATA(host->data_offset));
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/* memcpy from aligned buffer into output buffer */
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/* memcpy from aligned buffer into output buffer */
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memcpy(buf, aligned_buf, len);
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memcpy(buf, aligned_buf, len);
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buf += len;
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buf += len;
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@ -1100,11 +1104,11 @@ static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt)
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{
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{
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u16 *pdata = buf;
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u16 *pdata = buf;
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for (; cnt >= 2; cnt -= 2)
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for (; cnt >= 2; cnt -= 2)
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*pdata++ = mci_readw(host, DATA);
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*pdata++ = mci_readw(host, DATA(host->data_offset));
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buf = pdata;
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buf = pdata;
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}
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}
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if (cnt) {
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if (cnt) {
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host->part_buf16 = mci_readw(host, DATA);
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host->part_buf16 = mci_readw(host, DATA(host->data_offset));
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dw_mci_pull_final_bytes(host, buf, cnt);
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dw_mci_pull_final_bytes(host, buf, cnt);
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}
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}
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}
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}
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@ -1117,7 +1121,8 @@ static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt)
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buf += len;
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buf += len;
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cnt -= len;
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cnt -= len;
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if (!sg_next(host->sg) || host->part_buf_count == 4) {
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if (!sg_next(host->sg) || host->part_buf_count == 4) {
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mci_writel(host, DATA, host->part_buf32);
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mci_writel(host, DATA(host->data_offset),
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host->part_buf32);
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host->part_buf_count = 0;
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host->part_buf_count = 0;
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}
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}
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}
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}
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@ -1134,21 +1139,23 @@ static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt)
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cnt -= len;
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cnt -= len;
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/* push data from aligned buffer into fifo */
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/* push data from aligned buffer into fifo */
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for (i = 0; i < items; ++i)
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for (i = 0; i < items; ++i)
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mci_writel(host, DATA, aligned_buf[i]);
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mci_writel(host, DATA(host->data_offset),
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aligned_buf[i]);
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}
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}
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} else
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} else
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#endif
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#endif
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{
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{
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u32 *pdata = buf;
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u32 *pdata = buf;
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for (; cnt >= 4; cnt -= 4)
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for (; cnt >= 4; cnt -= 4)
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mci_writel(host, DATA, *pdata++);
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mci_writel(host, DATA(host->data_offset), *pdata++);
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buf = pdata;
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buf = pdata;
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}
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}
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/* put anything remaining in the part_buf */
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/* put anything remaining in the part_buf */
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if (cnt) {
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if (cnt) {
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dw_mci_set_part_bytes(host, buf, cnt);
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dw_mci_set_part_bytes(host, buf, cnt);
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if (!sg_next(host->sg))
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if (!sg_next(host->sg))
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mci_writel(host, DATA, host->part_buf32);
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mci_writel(host, DATA(host->data_offset),
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host->part_buf32);
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}
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}
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}
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}
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@ -1163,7 +1170,8 @@ static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt)
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int items = len >> 2;
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int items = len >> 2;
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int i;
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int i;
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for (i = 0; i < items; ++i)
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for (i = 0; i < items; ++i)
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aligned_buf[i] = mci_readl(host, DATA);
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aligned_buf[i] = mci_readl(host,
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DATA(host->data_offset));
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/* memcpy from aligned buffer into output buffer */
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/* memcpy from aligned buffer into output buffer */
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memcpy(buf, aligned_buf, len);
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memcpy(buf, aligned_buf, len);
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buf += len;
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buf += len;
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@ -1174,11 +1182,11 @@ static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt)
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{
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{
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u32 *pdata = buf;
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u32 *pdata = buf;
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for (; cnt >= 4; cnt -= 4)
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for (; cnt >= 4; cnt -= 4)
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*pdata++ = mci_readl(host, DATA);
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*pdata++ = mci_readl(host, DATA(host->data_offset));
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buf = pdata;
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buf = pdata;
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}
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}
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if (cnt) {
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if (cnt) {
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host->part_buf32 = mci_readl(host, DATA);
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host->part_buf32 = mci_readl(host, DATA(host->data_offset));
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dw_mci_pull_final_bytes(host, buf, cnt);
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dw_mci_pull_final_bytes(host, buf, cnt);
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}
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}
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}
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}
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@ -1191,7 +1199,8 @@ static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt)
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buf += len;
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buf += len;
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cnt -= len;
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cnt -= len;
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if (!sg_next(host->sg) || host->part_buf_count == 8) {
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if (!sg_next(host->sg) || host->part_buf_count == 8) {
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mci_writew(host, DATA, host->part_buf);
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mci_writew(host, DATA(host->data_offset),
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host->part_buf);
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host->part_buf_count = 0;
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host->part_buf_count = 0;
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}
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}
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}
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}
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@ -1208,21 +1217,23 @@ static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt)
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cnt -= len;
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cnt -= len;
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/* push data from aligned buffer into fifo */
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/* push data from aligned buffer into fifo */
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for (i = 0; i < items; ++i)
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for (i = 0; i < items; ++i)
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mci_writeq(host, DATA, aligned_buf[i]);
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mci_writeq(host, DATA(host->data_offset),
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aligned_buf[i]);
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}
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}
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} else
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} else
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#endif
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#endif
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{
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{
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u64 *pdata = buf;
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u64 *pdata = buf;
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for (; cnt >= 8; cnt -= 8)
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for (; cnt >= 8; cnt -= 8)
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mci_writeq(host, DATA, *pdata++);
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mci_writeq(host, DATA(host->data_offset), *pdata++);
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buf = pdata;
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buf = pdata;
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}
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}
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/* put anything remaining in the part_buf */
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/* put anything remaining in the part_buf */
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if (cnt) {
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if (cnt) {
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dw_mci_set_part_bytes(host, buf, cnt);
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dw_mci_set_part_bytes(host, buf, cnt);
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if (!sg_next(host->sg))
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if (!sg_next(host->sg))
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mci_writeq(host, DATA, host->part_buf);
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mci_writeq(host, DATA(host->data_offset),
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host->part_buf);
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}
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}
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}
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}
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@ -1237,7 +1248,8 @@ static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt)
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int items = len >> 3;
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int items = len >> 3;
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int i;
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int i;
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for (i = 0; i < items; ++i)
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for (i = 0; i < items; ++i)
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aligned_buf[i] = mci_readq(host, DATA);
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aligned_buf[i] = mci_readq(host,
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DATA(host->data_offset));
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/* memcpy from aligned buffer into output buffer */
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/* memcpy from aligned buffer into output buffer */
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memcpy(buf, aligned_buf, len);
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memcpy(buf, aligned_buf, len);
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buf += len;
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buf += len;
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@ -1248,11 +1260,11 @@ static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt)
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{
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{
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u64 *pdata = buf;
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u64 *pdata = buf;
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for (; cnt >= 8; cnt -= 8)
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for (; cnt >= 8; cnt -= 8)
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*pdata++ = mci_readq(host, DATA);
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*pdata++ = mci_readq(host, DATA(host->data_offset));
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buf = pdata;
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buf = pdata;
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}
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}
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if (cnt) {
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if (cnt) {
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host->part_buf = mci_readq(host, DATA);
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host->part_buf = mci_readq(host, DATA(host->data_offset));
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dw_mci_pull_final_bytes(host, buf, cnt);
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dw_mci_pull_final_bytes(host, buf, cnt);
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}
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}
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}
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}
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@ -1951,6 +1963,18 @@ static int dw_mci_probe(struct platform_device *pdev)
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}
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}
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}
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}
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/*
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* In 2.40a spec, Data offset is changed.
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* Need to check the version-id and set data-offset for DATA register.
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*/
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host->verid = SDMMC_GET_VERID(mci_readl(host, VERID));
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dev_info(&pdev->dev, "Version ID is %04x\n", host->verid);
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if (host->verid < DW_MMC_240A)
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host->data_offset = DATA_OFFSET;
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else
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host->data_offset = DATA_240A_OFFSET;
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/*
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/*
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* Enable interrupts for command done, data over, data empty, card det,
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* Enable interrupts for command done, data over, data empty, card det,
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* receive ready and error such as transmit, receive timeout, crc error
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* receive ready and error such as transmit, receive timeout, crc error
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@ -14,6 +14,8 @@
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#ifndef _DW_MMC_H_
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#ifndef _DW_MMC_H_
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#define _DW_MMC_H_
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#define _DW_MMC_H_
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#define DW_MMC_240A 0x240a
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#define SDMMC_CTRL 0x000
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#define SDMMC_CTRL 0x000
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#define SDMMC_PWREN 0x004
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#define SDMMC_PWREN 0x004
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#define SDMMC_CLKDIV 0x008
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#define SDMMC_CLKDIV 0x008
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@ -51,7 +53,14 @@
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#define SDMMC_IDINTEN 0x090
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#define SDMMC_IDINTEN 0x090
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#define SDMMC_DSCADDR 0x094
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#define SDMMC_DSCADDR 0x094
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#define SDMMC_BUFADDR 0x098
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#define SDMMC_BUFADDR 0x098
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#define SDMMC_DATA 0x100
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#define SDMMC_DATA(x) (x)
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/*
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* Data offset is difference according to Version
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* Lower than 2.40a : data register offest is 0x100
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*/
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#define DATA_OFFSET 0x100
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#define DATA_240A_OFFSET 0x200
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/* shift bit field */
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/* shift bit field */
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#define _SBF(f, v) ((v) << (f))
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#define _SBF(f, v) ((v) << (f))
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@ -130,6 +139,8 @@
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#define SDMMC_IDMAC_ENABLE BIT(7)
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#define SDMMC_IDMAC_ENABLE BIT(7)
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#define SDMMC_IDMAC_FB BIT(1)
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#define SDMMC_IDMAC_FB BIT(1)
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#define SDMMC_IDMAC_SWRESET BIT(0)
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#define SDMMC_IDMAC_SWRESET BIT(0)
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/* Version ID register define */
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#define SDMMC_GET_VERID(x) ((x) & 0xFFFF)
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/* Register access macros */
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/* Register access macros */
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#define mci_readl(dev, reg) \
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#define mci_readl(dev, reg) \
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@ -72,6 +72,8 @@ struct mmc_data;
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* rate and timeout calculations.
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* rate and timeout calculations.
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* @current_speed: Configured rate of the controller.
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* @current_speed: Configured rate of the controller.
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* @num_slots: Number of slots available.
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* @num_slots: Number of slots available.
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* @verid: Denote Version ID.
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* @data_offset: Set the offset of DATA register according to VERID.
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* @pdev: Platform device associated with the MMC controller.
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* @pdev: Platform device associated with the MMC controller.
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* @pdata: Platform data associated with the MMC controller.
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* @pdata: Platform data associated with the MMC controller.
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* @slot: Slots sharing this MMC controller.
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* @slot: Slots sharing this MMC controller.
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@ -147,6 +149,8 @@ struct dw_mci {
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u32 current_speed;
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u32 current_speed;
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u32 num_slots;
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u32 num_slots;
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u32 fifoth_val;
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u32 fifoth_val;
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u16 verid;
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u16 data_offset;
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struct platform_device *pdev;
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struct platform_device *pdev;
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struct dw_mci_board *pdata;
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struct dw_mci_board *pdata;
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struct dw_mci_slot *slot[MAX_MCI_SLOTS];
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struct dw_mci_slot *slot[MAX_MCI_SLOTS];
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