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remoteproc: qcom_q6v5_mss: Monitor MSS_STATUS for boot completion
On secure devices there exists a race condition which could lock the MSS CONFIG AHB bus thus preventing access to BOOT_STATUS register during SSR. Switch to polling the MSS_STATUS register with an additional 10 us delay to reliably track boot completion. Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20200716120514.21588-1-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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1 changed files with 6 additions and 6 deletions
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@ -112,8 +112,6 @@
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#define QDSP6SS_SLEEP 0x3C
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#define QDSP6SS_BOOT_CORE_START 0x400
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#define QDSP6SS_BOOT_CMD 0x404
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#define QDSP6SS_BOOT_STATUS 0x408
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#define BOOT_STATUS_TIMEOUT_US 200
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#define BOOT_FSM_TIMEOUT 10000
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struct reg_info {
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@ -579,13 +577,15 @@ static int q6v5proc_reset(struct q6v5 *qproc)
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/* De-assert the Q6 stop core signal */
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writel(1, qproc->reg_base + QDSP6SS_BOOT_CORE_START);
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/* Wait for 10 us for any staggering logic to settle */
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usleep_range(10, 20);
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/* Trigger the boot FSM to start the Q6 out-of-reset sequence */
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writel(1, qproc->reg_base + QDSP6SS_BOOT_CMD);
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/* Poll the QDSP6SS_BOOT_STATUS for FSM completion */
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ret = readl_poll_timeout(qproc->reg_base + QDSP6SS_BOOT_STATUS,
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val, (val & BIT(0)) != 0, 1,
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BOOT_STATUS_TIMEOUT_US);
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/* Poll the MSS_STATUS for FSM completion */
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ret = readl_poll_timeout(qproc->rmb_base + RMB_MBA_MSS_STATUS,
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val, (val & BIT(0)) != 0, 10, BOOT_FSM_TIMEOUT);
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if (ret) {
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dev_err(qproc->dev, "Boot FSM failed to complete.\n");
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/* Reset the modem so that boot FSM is in reset state */
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