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[MIPS] VR41xx: Set VR41_CONF_BP only for PrId 0x0c80.

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Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Yoichi Yuasa 2006-07-04 22:59:41 +09:00 committed by Ralf Baechle
parent f72af3cf06
commit 4e8ab36182
2 changed files with 4 additions and 1 deletions
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4
arch/mips/mm/c-r4k.c
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@ -868,7 +868,9 @@ static void __init probe_pcache(void)
if (c->processor_id == 0x0c80U || c->processor_id == 0x0c81U ||
c->processor_id == 0x0c82U) {
config &= ~0x00000030U;
config |= 0x00410000U;
config |= 0x00400000U;
if (c->processor_id == 0x0c80U)
config |= VR41_CONF_BP;
write_c0_config(config);
}
icache_size = 1 << (10 + ((config & CONF_IC) >> 9));

1
include/asm-mips/mipsregs.h
View file

@ -470,6 +470,7 @@
/* Bits specific to the VR41xx. */
#define VR41_CONF_CS (_ULCAST_(1) << 12)
#define VR41_CONF_BP (_ULCAST_(1) << 16)
#define VR41_CONF_M16 (_ULCAST_(1) << 20)
#define VR41_CONF_AD (_ULCAST_(1) << 23)