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ata: sata_dwc_460ex: burst size must be in items not bytes

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The burst size as defined by DMAengine API is in items of address width. Derive
burst size from AHB_DMA_BRST_DFLT (64 bytes) by dividing it to
DMA_SLAVE_BUSWIDTH_4_BYTES (4 bytes) that gives us 16 items.

Tested-by: Christian Lamparter <chunkeey@googlemail.com>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
This commit is contained in:
Andy Shevchenko 2016-04-26 12:03:05 +03:00 committed by Tejun Heo
parent 6689dfac00
commit 4ea8c205e5
1 changed files with 3 additions and 3 deletions
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6
drivers/ata/sata_dwc_460ex.c
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@ -65,7 +65,7 @@
#define NO_IRQ 0
#endif
#define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length*/
#define AHB_DMA_BRST_DFLT 64 /* 16 data items burst length */
enum {
SATA_DWC_MAX_PORTS = 1,
@ -318,8 +318,8 @@ static struct dma_async_tx_descriptor *dma_dwc_xfer_setup(struct ata_queued_cmd
}
sconf.direction = qc->dma_dir;
sconf.src_maxburst = AHB_DMA_BRST_DFLT;
sconf.dst_maxburst = AHB_DMA_BRST_DFLT;
sconf.src_maxburst = AHB_DMA_BRST_DFLT / 4; /* in items */
sconf.dst_maxburst = AHB_DMA_BRST_DFLT / 4; /* in items */
sconf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
sconf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;