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ARM: dts: rename the clock of MIPI DSI 'pll_clk' to 'sclk_mipi'

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The clock which was named as 'pll_clk' is actually not the clock source
of PLL in MIPI DSI. This patch fixes this disagreement.

Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com>
Acked-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
This commit is contained in:
Hyungwon Hwang 2015-06-12 21:59:10 +09:00 committed by Inki Dae
parent 51d1deca9f
commit 4f01e65037
1 changed files with 1 additions and 1 deletions
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2
arch/arm/boot/dts/exynos4.dtsi
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@ -167,7 +167,7 @@ dsi_0: dsi@11C80000 {
phys = <&mipi_phy 1>;
phy-names = "dsim";
clocks = <&clock CLK_DSIM0>, <&clock CLK_SCLK_MIPI0>;
clock-names = "bus_clk", "pll_clk";
clock-names = "bus_clk", "sclk_mipi";
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;