mirrors/linux-stable
1
0
Fork 0
mirror of https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git synced 2024-09-28 21:33:52 +00:00
Code Issues Releases Wiki Activity

ASoC: SOF: Intel: HDA: add cAVS specific compact IPC header file

Browse source 
On cAVS platforms, some IPCs are required to be sent via IPC registers
only(e.g. when in D0i3, mailbox is unaccessible), add hda-ipc.h to hold
definition of those compact IPCs.

Signed-off-by: Keyon Jie <yang.jie@linux.intel.com>
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20191025224122.7718-16-pierre-louis.bossart@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Keyon Jie 2019-10-25 17:41:11 -05:00 committed by Mark Brown
parent 463fbf6dc0
commit 5056193d4d
No known key found for this signature in database
GPG key ID: 24D68B725D5487D0
1 changed files with 51 additions and 0 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

51
sound/soc/sof/intel/hda-ipc.h Normal file
View file

@ -0,0 +1,51 @@
/* SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) */
/*
* This file is provided under a dual BSD/GPLv2 license. When using or
* redistributing this file, you may do so under either license.
*
* Copyright(c) 2019 Intel Corporation. All rights reserved.
*
* Author: Keyon Jie <yang.jie@linux.intel.com>
*/
#ifndef __SOF_INTEL_HDA_IPC_H
#define __SOF_INTEL_HDA_IPC_H
/*
* Primary register, mapped to
* - DIPCTDR (HIPCIDR) in sideband IPC (cAVS 1.8+)
* - DIPCT in cAVS 1.5 IPC
*
* Secondary register, mapped to:
* - DIPCTDD (HIPCIDD) in sideband IPC (cAVS 1.8+)
* - DIPCTE in cAVS 1.5 IPC
*/
/* Common bits in primary register */
/* Reserved for doorbell */
#define HDA_IPC_RSVD_31 BIT(31)
/* Target, 0 - normal message, 1 - compact message(cAVS compatible) */
#define HDA_IPC_MSG_COMPACT BIT(30)
/* Direction, 0 - request, 1 - response */
#define HDA_IPC_RSP BIT(29)
#define HDA_IPC_TYPE_SHIFT 24
#define HDA_IPC_TYPE_MASK GENMASK(28, 24)
#define HDA_IPC_TYPE(x) ((x) << HDA_IPC_TYPE_SHIFT)
#define HDA_IPC_PM_GATE HDA_IPC_TYPE(0x8U)
/* Command specific payload bits in secondary register */
/* Disable DMA tracing (0 - keep tracing, 1 - to disable DMA trace) */
#define HDA_PM_NO_DMA_TRACE BIT(4)
/* Prevent clock gating (0 - cg allowed, 1 - DSP clock always on) */
#define HDA_PM_PCG BIT(3)
/* Prevent power gating (0 - deep power state transitions allowed) */
#define HDA_PM_PPG BIT(2)
/* Indicates whether streaming is active */
#define HDA_PM_PG_STREAMING BIT(1)
#define HDA_PM_PG_RSVD BIT(0)
#endif