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Staging: rts5208: helper function to enable interrupts during reset
Define the helper function rtsx_enable_pcie_intr to shorten the rtsx_reset_chip code and get rid of the LONG_LINE checkpatch warnings. Signed-off-by: Fabio Falzoi <fabio.falzoi84@gmail.com> Reviewed-by: Dan Carpenter <dan.carpente@oracle.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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5d069c8886
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506fe17dae
1 changed files with 48 additions and 47 deletions
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@ -263,6 +263,51 @@ static int rtsx_reset_aspm(struct rtsx_chip *chip)
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return STATUS_SUCCESS;
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}
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static int rtsx_enable_pcie_intr(struct rtsx_chip *chip)
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{
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int ret;
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if (!chip->asic_code || !CHECK_PID(chip, 0x5208)) {
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rtsx_enable_bus_int(chip);
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return STATUS_SUCCESS;
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}
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if (chip->phy_debug_mode) {
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RTSX_WRITE_REG(chip, CDRESUMECTL, 0x77, 0);
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rtsx_disable_bus_int(chip);
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} else {
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rtsx_enable_bus_int(chip);
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}
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if (chip->ic_version >= IC_VER_D) {
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u16 reg;
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ret = rtsx_read_phy_register(chip, 0x00, ®);
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if (ret != STATUS_SUCCESS)
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TRACE_RET(chip, STATUS_FAIL);
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reg &= 0xFE7F;
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reg |= 0x80;
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ret = rtsx_write_phy_register(chip, 0x00, reg);
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if (ret != STATUS_SUCCESS)
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TRACE_RET(chip, STATUS_FAIL);
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ret = rtsx_read_phy_register(chip, 0x1C, ®);
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if (ret != STATUS_SUCCESS)
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TRACE_RET(chip, STATUS_FAIL);
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reg &= 0xFFF7;
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ret = rtsx_write_phy_register(chip, 0x1C, reg);
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if (ret != STATUS_SUCCESS)
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TRACE_RET(chip, STATUS_FAIL);
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}
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if (chip->driver_first_load && (chip->ic_version < IC_VER_C))
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rtsx_calibration(chip);
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return STATUS_SUCCESS;
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}
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int rtsx_reset_chip(struct rtsx_chip *chip)
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{
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int retval;
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@ -367,53 +412,9 @@ int rtsx_reset_chip(struct rtsx_chip *chip)
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RTSX_WRITE_REG(chip, PERST_GLITCH_WIDTH, 0xFF, 0x80);
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/* Enable PCIE interrupt */
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if (chip->asic_code) {
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if (CHECK_PID(chip, 0x5208)) {
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if (chip->phy_debug_mode) {
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RTSX_WRITE_REG(chip, CDRESUMECTL, 0x77, 0);
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rtsx_disable_bus_int(chip);
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} else {
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rtsx_enable_bus_int(chip);
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}
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if (chip->ic_version >= IC_VER_D) {
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u16 reg;
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retval = rtsx_read_phy_register(chip, 0x00,
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®);
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if (retval != STATUS_SUCCESS)
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TRACE_RET(chip, STATUS_FAIL);
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reg &= 0xFE7F;
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reg |= 0x80;
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retval = rtsx_write_phy_register(chip, 0x00,
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reg);
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if (retval != STATUS_SUCCESS)
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TRACE_RET(chip, STATUS_FAIL);
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retval = rtsx_read_phy_register(chip, 0x1C,
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®);
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if (retval != STATUS_SUCCESS)
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TRACE_RET(chip, STATUS_FAIL);
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reg &= 0xFFF7;
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retval = rtsx_write_phy_register(chip, 0x1C,
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reg);
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if (retval != STATUS_SUCCESS)
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TRACE_RET(chip, STATUS_FAIL);
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}
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if (chip->driver_first_load &&
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(chip->ic_version < IC_VER_C))
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rtsx_calibration(chip);
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} else {
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rtsx_enable_bus_int(chip);
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}
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} else {
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rtsx_enable_bus_int(chip);
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}
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retval = rtsx_enable_pcie_intr(chip);
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if (retval != STATUS_SUCCESS)
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TRACE_RET(chip, STATUS_FAIL);
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chip->need_reset = 0;
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