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ath11k: don't call ath11k_pci_set_l1ss for WCN6855

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For QCA6390, one PCI related clock drifts sometimes, and it makes
PCI link difficult to quit L1ss. Current implementation fixed this
by configuring some related regs using ath11k_pci_fix_l1ss.

WCN6855 does not have this clock drift problem, so no need to set
these regs.

Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-01720.1-QCAHSPSWPL_V1_V2_SILICONZ_LITE-1
Tested-on: QCA6390 hw2.0 PCI WLAN.HST.1.0.1-01740-QCAHSTSWPLZ_V2_TO_X86-1

Signed-off-by: Baochen Qiang <bqiang@codeaurora.org>
Signed-off-by: Jouni Malinen <jouni@codeaurora.org>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
Link: https://lore.kernel.org/r/20210511162214.29475-8-jouni@codeaurora.org
This commit is contained in:
Baochen Qiang 2021-05-31 17:41:28 +03:00 committed by Kalle Valo
parent 0fbf195700
commit 5088df0504
3 changed files with 8 additions and 1 deletions
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5
drivers/net/wireless/ath/ath11k/core.c
View file

@ -70,6 +70,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.cold_boot_calib = true,
.supports_suspend = false,
.hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
.fix_l1ss = true,
},
{
.hw_rev = ATH11K_HW_IPQ6018_HW10,
@ -110,6 +111,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.cold_boot_calib = true,
.supports_suspend = false,
.hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
.fix_l1ss = true,
},
{
.name = "qca6390 hw2.0",
@ -149,6 +151,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.cold_boot_calib = false,
.supports_suspend = true,
.hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
.fix_l1ss = true,
},
{
.name = "qcn9074 hw1.0",
@ -186,6 +189,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.cold_boot_calib = false,
.supports_suspend = false,
.hal_desc_sz = sizeof(struct hal_rx_desc_qcn9074),
.fix_l1ss = true,
},
{
.name = "wcn6855 hw2.0",
@ -225,6 +229,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
.cold_boot_calib = false,
.supports_suspend = true,
.hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),
.fix_l1ss = false,
},
};

1
drivers/net/wireless/ath/ath11k/hw.h
View file

@ -162,6 +162,7 @@ struct ath11k_hw_params {
bool cold_boot_calib;
bool supports_suspend;
u32 hal_desc_sz;
bool fix_l1ss;
};
struct ath11k_hw_ops {

3
drivers/net/wireless/ath/ath11k/pci.c
View file

@ -434,7 +434,8 @@ static void ath11k_pci_sw_reset(struct ath11k_base *ab, bool power_on)
ath11k_pci_enable_ltssm(ab);
ath11k_pci_clear_all_intrs(ab);
ath11k_pci_set_wlaon_pwr_ctrl(ab);
ath11k_pci_fix_l1ss(ab);
if (ab->hw_params.fix_l1ss)
ath11k_pci_fix_l1ss(ab);
}
ath11k_mhi_clear_vector(ab);