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arm64: dts: realtek: Add RTD1296 and Synology DS418
Add Device Trees for RTD1296 SoC and Synology DiskStation DS418. Cc: info@synology.com Signed-off-by: Andreas Färber <afaerber@suse.de>
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3 changed files with 97 additions and 0 deletions
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@ -5,3 +5,5 @@ dtb-$(CONFIG_ARCH_REALTEK) += rtd1293-ds418j.dtb
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dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-mele-v9.dtb
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dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-probox2-ava.dtb
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dtb-$(CONFIG_ARCH_REALTEK) += rtd1295-zidoo-x9s.dtb
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dtb-$(CONFIG_ARCH_REALTEK) += rtd1296-ds418.dtb
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30
arch/arm64/boot/dts/realtek/rtd1296-ds418.dts
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30
arch/arm64/boot/dts/realtek/rtd1296-ds418.dts
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@ -0,0 +1,30 @@
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// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
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/*
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* Copyright (c) 2017-2019 Andreas Färber
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*/
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/dts-v1/;
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#include "rtd1296.dtsi"
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/ {
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compatible = "synology,ds418", "realtek,rtd1296";
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model = "Synology DiskStation DS418";
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x80000000>;
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};
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aliases {
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serial0 = &uart0;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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};
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&uart0 {
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status = "okay";
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};
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65
arch/arm64/boot/dts/realtek/rtd1296.dtsi
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arch/arm64/boot/dts/realtek/rtd1296.dtsi
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@ -0,0 +1,65 @@
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// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
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/*
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* Realtek RTD1296 SoC
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*
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* Copyright (c) 2017-2019 Andreas Färber
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*/
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#include "rtd129x.dtsi"
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/ {
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compatible = "realtek,rtd1296";
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cpus {
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#address-cells = <2>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x0>;
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next-level-cache = <&l2>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x1>;
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next-level-cache = <&l2>;
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};
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cpu2: cpu@2 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x2>;
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next-level-cache = <&l2>;
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};
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cpu3: cpu@3 {
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device_type = "cpu";
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compatible = "arm,cortex-a53";
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reg = <0x0 0x3>;
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next-level-cache = <&l2>;
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};
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l2: l2-cache {
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compatible = "cache";
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};
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13
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(GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 14
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(GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 11
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(GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>,
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<GIC_PPI 10
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(GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_LOW)>;
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};
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};
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&arm_pmu {
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interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
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};
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