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Samsung fixes for v3.11
- fix kernel booting on exynos5440 skip pm which is not supported update regarding LPAE features - fix s3c2440 uart with adding clkdev entries - fix compilatioin for Samsung SoCs with selecting pm - update ARCH_NR_GPIO to support exynos4412 has more gpios -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJR8AZBAAoJEA0Cl+kVi2xqSNIP/iBgogT3O18Aj2dclg9QDh7L YTnT60p7VsoevAb+mVS0rcxpgFGIvuM6TII65VGMNQNeHgwOJzrFT2rWe0NQ0kCw DUE3717+sHcqiGDxnsyffeJL+7THSZiZUzkgxmKSb22yTzb1uO1gDrF2uT/njAgh 6lsthqKZjKhi8KL9qXGEeh1HgxNaQWGUrTcpEWFGYxpF+wyrQuFjOJoRQJc7dKsp JdlSiR+R5mTWvo5HAiT0QH97JzT5xuk5p8lMrxbmkwfEmewKeM89uIv1bjrOl3qa O4OY5fZ5oamQBjETTfeQtgJxciKrogg3uyCjsVsX2PX0s1u/vcukJnn52wY9gb64 y6Ge6qlwnzWkhvPEJeH9GEGDQcUPr9OgZABSBxNTja6rJdTjHJKgImU38BvLOopp nedsmDn63kTi7Vr4NDP8iRcMenEZMeaGuscVvU4TfdBOX95RJOu4SI3fT/VCSuvm hHvjfGfLUF15P0qdAthvmj8W4ZbNr0KViP12kaEF4MeU+MqOiZb8JlHP9ebPp7ao FtO47Mic1FIdA4mL6GEbJxK43N1klNQ6q/xobOattPA2TPZ4sk4nCB3lqtXS2ZFJ 51yToCMv23oY5AynP95qAMnYYJCP1UyPHlsV7n8jMgm3ZzePC2pv1WAZr4ZsPWu3 zBJom5YPKZUaoDN7xl7z =ygWA -----END PGP SIGNATURE----- Merge tag 'samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into fixes From Kukjin Kim: Samsung fixes for v3.11 - fix kernel booting on exynos5440 skip pm which is not supported update regarding LPAE features - fix s3c2440 uart with adding clkdev entries - fix compilatioin for Samsung SoCs with selecting pm - update ARCH_NR_GPIO to support exynos4412 has more gpios * tag 'samsung-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: ARM: EXYNOS: Update CONFIG_ARCH_NR_GPIO for Exynos ARM: EXYNOS: Fix low level debug support ARM: SAMSUNG: Save/restore only selected uart's registers ARM: SAMSUNG: Add SAMSUNG_PM config option to select pm ARM: S3C24XX: Add missing clkdev entries for s3c2440 UART ARM: EXYNOS: Enable 64-bit DMA for EXYNOS5440 if LPAE is enabled ARM: EXYNOS: change the PHYSMEM_BITS and SECTION_SIZE ARM: EXYNOS: skip pm support on exynos5440 Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
51378066fc
15 changed files with 136 additions and 109 deletions
|
@ -1600,8 +1600,7 @@ config LOCAL_TIMERS
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config ARCH_NR_GPIO
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int
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default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
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default 512 if SOC_OMAP5
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default 512 if ARCH_KEYSTONE
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default 512 if ARCH_EXYNOS || ARCH_KEYSTONE || SOC_OMAP5
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default 392 if ARCH_U8500
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default 352 if ARCH_VT8500
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default 288 if ARCH_SUNXI
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@ -92,6 +92,7 @@ config SOC_EXYNOS5440
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bool "SAMSUNG EXYNOS5440"
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default y
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depends on ARCH_EXYNOS5
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select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE
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select ARCH_HAS_OPP
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select HAVE_ARM_ARCH_TIMER
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select AUTO_ZRELADDR
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@ -14,7 +14,7 @@ obj- :=
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obj-$(CONFIG_ARCH_EXYNOS) += common.o
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obj-$(CONFIG_PM) += pm.o
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obj-$(CONFIG_S5P_PM) += pm.o
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obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
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obj-$(CONFIG_CPU_IDLE) += cpuidle.o
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@ -58,7 +58,6 @@ static const char name_exynos5440[] = "EXYNOS5440";
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static void exynos4_map_io(void);
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static void exynos5_map_io(void);
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static void exynos5440_map_io(void);
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static int exynos_init(void);
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static struct cpu_table cpu_ids[] __initdata = {
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@ -95,7 +94,6 @@ static struct cpu_table cpu_ids[] __initdata = {
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}, {
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.idcode = EXYNOS5440_SOC_ID,
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.idmask = EXYNOS5_SOC_MASK,
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.map_io = exynos5440_map_io,
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.init = exynos_init,
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.name = name_exynos5440,
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},
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@ -149,11 +147,6 @@ static struct map_desc exynos4_iodesc[] __initdata = {
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.pfn = __phys_to_pfn(EXYNOS4_PA_GIC_DIST),
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.length = SZ_64K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_UART,
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.pfn = __phys_to_pfn(EXYNOS4_PA_UART),
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.length = SZ_512K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S5P_VA_CMU,
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.pfn = __phys_to_pfn(EXYNOS4_PA_CMU),
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@ -268,20 +261,6 @@ static struct map_desc exynos5_iodesc[] __initdata = {
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.pfn = __phys_to_pfn(EXYNOS5_PA_PMU),
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.length = SZ_64K,
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.type = MT_DEVICE,
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}, {
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.virtual = (unsigned long)S3C_VA_UART,
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.pfn = __phys_to_pfn(EXYNOS5_PA_UART),
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.length = SZ_512K,
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.type = MT_DEVICE,
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},
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};
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static struct map_desc exynos5440_iodesc0[] __initdata = {
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{
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.virtual = (unsigned long)S3C_VA_UART,
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.pfn = __phys_to_pfn(EXYNOS5440_PA_UART0),
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.length = SZ_512K,
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.type = MT_DEVICE,
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},
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};
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@ -388,11 +367,6 @@ static void __init exynos5_map_io(void)
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iotable_init(exynos5250_iodesc, ARRAY_SIZE(exynos5250_iodesc));
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}
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static void __init exynos5440_map_io(void)
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{
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iotable_init(exynos5440_iodesc0, ARRAY_SIZE(exynos5440_iodesc0));
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}
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void __init exynos_init_time(void)
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{
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of_clk_init(NULL);
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@ -97,6 +97,5 @@ struct exynos_pmu_conf {
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};
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extern void exynos_sys_powerdown_conf(enum sys_powerdown mode);
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extern void s3c_cpu_resume(void);
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#endif /* __ARCH_ARM_MACH_EXYNOS_COMMON_H */
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@ -25,6 +25,7 @@
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#include <mach/regs-pmu.h>
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#include <plat/cpu.h>
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#include <plat/pm.h>
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#include "common.h"
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@ -15,8 +15,13 @@
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#define PLAT_PHYS_OFFSET UL(0x40000000)
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#ifndef CONFIG_ARM_LPAE
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/* Maximum of 256MiB in one bank */
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#define MAX_PHYSMEM_BITS 32
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#define SECTION_SIZE_BITS 28
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#else
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#define MAX_PHYSMEM_BITS 36
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#define SECTION_SIZE_BITS 31
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#endif
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#endif /* __ASM_ARCH_MEMORY_H */
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@ -217,6 +217,9 @@ static __init int exynos_pm_drvinit(void)
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struct clk *pll_base;
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unsigned int tmp;
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if (soc_is_exynos5440())
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return 0;
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s3c_pm_init();
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/* All wakeup disable */
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@ -340,6 +343,9 @@ static struct syscore_ops exynos_pm_syscore_ops = {
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static __init int exynos_pm_syscore_init(void)
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{
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if (soc_is_exynos5440())
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return 0;
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register_syscore_ops(&exynos_pm_syscore_ops);
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return 0;
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}
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@ -119,66 +119,101 @@ static struct clk init_clocks_off[] = {
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}
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};
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static struct clk init_clocks[] = {
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{
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.name = "lcd",
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.parent = &clk_h,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_LCDC,
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}, {
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.name = "gpio",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_GPIO,
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}, {
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.name = "usb-host",
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.parent = &clk_h,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_USBH,
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}, {
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.name = "usb-device",
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.parent = &clk_h,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_USBD,
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}, {
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.name = "timers",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_PWMT,
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}, {
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.name = "uart",
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.devname = "s3c2410-uart.0",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_UART0,
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}, {
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.name = "uart",
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.devname = "s3c2410-uart.1",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_UART1,
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}, {
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.name = "uart",
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.devname = "s3c2410-uart.2",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_UART2,
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}, {
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.name = "rtc",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_RTC,
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}, {
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.name = "watchdog",
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.parent = &clk_p,
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.ctrlbit = 0,
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}, {
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.name = "usb-bus-host",
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.parent = &clk_usb_bus,
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}, {
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.name = "usb-bus-gadget",
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.parent = &clk_usb_bus,
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},
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static struct clk clk_lcd = {
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.name = "lcd",
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.parent = &clk_h,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_LCDC,
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};
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static struct clk clk_gpio = {
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.name = "gpio",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_GPIO,
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};
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static struct clk clk_usb_host = {
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.name = "usb-host",
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.parent = &clk_h,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_USBH,
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};
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static struct clk clk_usb_device = {
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.name = "usb-device",
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.parent = &clk_h,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_USBD,
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};
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static struct clk clk_timers = {
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.name = "timers",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_PWMT,
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};
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struct clk s3c24xx_clk_uart0 = {
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.name = "uart",
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.devname = "s3c2410-uart.0",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_UART0,
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};
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struct clk s3c24xx_clk_uart1 = {
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.name = "uart",
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.devname = "s3c2410-uart.1",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_UART1,
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};
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struct clk s3c24xx_clk_uart2 = {
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.name = "uart",
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.devname = "s3c2410-uart.2",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_UART2,
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};
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static struct clk clk_rtc = {
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.name = "rtc",
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.parent = &clk_p,
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.enable = s3c2410_clkcon_enable,
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.ctrlbit = S3C2410_CLKCON_RTC,
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};
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static struct clk clk_watchdog = {
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.name = "watchdog",
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.parent = &clk_p,
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.ctrlbit = 0,
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};
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static struct clk clk_usb_bus_host = {
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.name = "usb-bus-host",
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.parent = &clk_usb_bus,
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};
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static struct clk clk_usb_bus_gadget = {
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.name = "usb-bus-gadget",
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.parent = &clk_usb_bus,
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};
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static struct clk *init_clocks[] = {
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&clk_lcd,
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&clk_gpio,
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&clk_usb_host,
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&clk_usb_device,
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&clk_timers,
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&s3c24xx_clk_uart0,
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&s3c24xx_clk_uart1,
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&s3c24xx_clk_uart2,
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&clk_rtc,
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&clk_watchdog,
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&clk_usb_bus_host,
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&clk_usb_bus_gadget,
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};
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/* s3c2410_baseclk_add()
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@ -195,7 +230,6 @@ int __init s3c2410_baseclk_add(void)
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{
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unsigned long clkslow = __raw_readl(S3C2410_CLKSLOW);
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unsigned long clkcon = __raw_readl(S3C2410_CLKCON);
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struct clk *clkp;
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struct clk *xtal;
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int ret;
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int ptr;
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@ -207,8 +241,9 @@ int __init s3c2410_baseclk_add(void)
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/* register clocks from clock array */
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clkp = init_clocks;
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for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++, clkp++) {
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for (ptr = 0; ptr < ARRAY_SIZE(init_clocks); ptr++) {
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struct clk *clkp = init_clocks[ptr];
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/* ensure that we note the clock state */
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clkp->usage = clkcon & clkp->ctrlbit ? 1 : 0;
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|
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@ -166,6 +166,9 @@ static struct clk_lookup s3c2440_clk_lookup[] = {
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CLKDEV_INIT(NULL, "clk_uart_baud1", &s3c24xx_uclk),
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CLKDEV_INIT(NULL, "clk_uart_baud2", &clk_p),
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CLKDEV_INIT(NULL, "clk_uart_baud3", &s3c2440_clk_fclk_n),
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CLKDEV_INIT("s3c2440-uart.0", "uart", &s3c24xx_clk_uart0),
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CLKDEV_INIT("s3c2440-uart.1", "uart", &s3c24xx_clk_uart1),
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CLKDEV_INIT("s3c2440-uart.2", "uart", &s3c24xx_clk_uart2),
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CLKDEV_INIT("s3c2440-camif", "camera", &s3c2440_clk_cam_upll),
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};
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|
|
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@ -29,6 +29,13 @@ config PLAT_S5P
|
|||
help
|
||||
Base platform code for Samsung's S5P series SoC.
|
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|
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config SAMSUNG_PM
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bool
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depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5P64X0 || S5P_PM)
|
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default y
|
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help
|
||||
Base platform power management code for samsung code
|
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|
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if PLAT_SAMSUNG
|
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# boot configurations
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|
|
|
@ -51,7 +51,7 @@ obj-$(CONFIG_SAMSUNG_DMADEV) += dma-ops.o
|
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|
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# PM support
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|
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obj-$(CONFIG_PM) += pm.o
|
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obj-$(CONFIG_SAMSUNG_PM) += pm.o
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obj-$(CONFIG_SAMSUNG_PM_GPIO) += pm-gpio.o
|
||||
obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o
|
||||
|
||||
|
|
|
@ -83,6 +83,11 @@ extern struct clk clk_ext;
|
|||
extern struct clksrc_clk clk_epllref;
|
||||
extern struct clksrc_clk clk_esysclk;
|
||||
|
||||
/* S3C24XX UART clocks */
|
||||
extern struct clk s3c24xx_clk_uart0;
|
||||
extern struct clk s3c24xx_clk_uart1;
|
||||
extern struct clk s3c24xx_clk_uart2;
|
||||
|
||||
/* S3C64XX specific clocks */
|
||||
extern struct clk clk_h2;
|
||||
extern struct clk clk_27m;
|
||||
|
|
|
@ -19,7 +19,7 @@
|
|||
|
||||
struct device;
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
#ifdef CONFIG_SAMSUNG_PM
|
||||
|
||||
extern __init int s3c_pm_init(void);
|
||||
extern __init int s3c64xx_pm_init(void);
|
||||
|
@ -58,8 +58,6 @@ extern unsigned char pm_uart_udivslot; /* true to save UART UDIVSLOT */
|
|||
|
||||
/* from sleep.S */
|
||||
|
||||
extern void s3c_cpu_resume(void);
|
||||
|
||||
extern int s3c2410_cpu_suspend(unsigned long);
|
||||
|
||||
/* sleep save info */
|
||||
|
@ -106,12 +104,14 @@ extern void s3c_pm_do_save(struct sleep_save *ptr, int count);
|
|||
extern void s3c_pm_do_restore(struct sleep_save *ptr, int count);
|
||||
extern void s3c_pm_do_restore_core(struct sleep_save *ptr, int count);
|
||||
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||||
#ifdef CONFIG_PM
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#ifdef CONFIG_SAMSUNG_PM
|
||||
extern int s3c_irq_wake(struct irq_data *data, unsigned int state);
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||||
extern int s3c_irqext_wake(struct irq_data *data, unsigned int state);
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extern void s3c_cpu_resume(void);
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||||
#else
|
||||
#define s3c_irq_wake NULL
|
||||
#define s3c_irqext_wake NULL
|
||||
#define s3c_cpu_resume NULL
|
||||
#endif
|
||||
|
||||
/* PM debug functions */
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||||
|
|
|
@ -80,7 +80,7 @@ unsigned char pm_uart_udivslot;
|
|||
|
||||
#ifdef CONFIG_SAMSUNG_PM_DEBUG
|
||||
|
||||
static struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
|
||||
static struct pm_uart_save uart_save;
|
||||
|
||||
static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
|
||||
{
|
||||
|
@ -101,11 +101,7 @@ static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
|
|||
|
||||
static void s3c_pm_save_uarts(void)
|
||||
{
|
||||
struct pm_uart_save *save = uart_save;
|
||||
unsigned int uart;
|
||||
|
||||
for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
|
||||
s3c_pm_save_uart(uart, save);
|
||||
s3c_pm_save_uart(CONFIG_DEBUG_S3C_UART, &uart_save);
|
||||
}
|
||||
|
||||
static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
|
||||
|
@ -126,11 +122,7 @@ static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
|
|||
|
||||
static void s3c_pm_restore_uarts(void)
|
||||
{
|
||||
struct pm_uart_save *save = uart_save;
|
||||
unsigned int uart;
|
||||
|
||||
for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
|
||||
s3c_pm_restore_uart(uart, save);
|
||||
s3c_pm_restore_uart(CONFIG_DEBUG_S3C_UART, &uart_save);
|
||||
}
|
||||
#else
|
||||
static void s3c_pm_save_uarts(void) { }
|
||||
|
|
Loading…
Reference in a new issue