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sdhci: add no hi-speed bit quirk support

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Some SDHCI controllers like s5pc110 don't have an HISPD bit in the HOSTCTL
register.

Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Cc: <linux-mmc@vger.kernel.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Kyungmin Park 2010-08-19 14:13:35 -07:00 committed by Linus Torvalds
parent 930a6f70fa
commit 5193250168
2 changed files with 4 additions and 1 deletions
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3
drivers/mmc/host/sdhci.c
View file

@ -1180,7 +1180,8 @@ static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
else else
ctrl &= ~SDHCI_CTRL_4BITBUS; ctrl &= ~SDHCI_CTRL_4BITBUS;
if (ios->timing == MMC_TIMING_SD_HS) if (ios->timing == MMC_TIMING_SD_HS &&
!(host->quirks & SDHCI_QUIRK_NO_HISPD_BIT))
ctrl |= SDHCI_CTRL_HISPD; ctrl |= SDHCI_CTRL_HISPD;
else else
ctrl &= ~SDHCI_CTRL_HISPD; ctrl &= ~SDHCI_CTRL_HISPD;

2
drivers/mmc/host/sdhci.h
View file

@ -245,6 +245,8 @@ struct sdhci_host {
#define SDHCI_QUIRK_MISSING_CAPS (1<<27) #define SDHCI_QUIRK_MISSING_CAPS (1<<27)
/* Controller uses Auto CMD12 command to stop the transfer */ /* Controller uses Auto CMD12 command to stop the transfer */
#define SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 (1<<28) #define SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12 (1<<28)
/* Controller doesn't have HISPD bit field in HI-SPEED SD card */
#define SDHCI_QUIRK_NO_HISPD_BIT (1<<29)
int irq; /* Device IRQ */ int irq; /* Device IRQ */
void __iomem * ioaddr; /* Mapped address */ void __iomem * ioaddr; /* Mapped address */