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Merge branch 'linux-4.15' of git://github.com/skeggsb/linux into drm-fixes
nouveau regression fixes, and some minor fixes. * 'linux-4.15' of git://github.com/skeggsb/linux: drm/nouveau: use alternate memory type for system-memory buffers with kind != 0 drm/nouveau: avoid GPU page sizes > PAGE_SIZE for buffer objects in host memory drm/nouveau/mmu/gp10b: use correct implementation drm/nouveau/pci: do a msi rearm on init drm/nouveau/imem/nv50: fix refcount_t warning drm/nouveau/bios/dp: support DP Info Table 2.0 drm/nouveau/fbcon: fix NULL pointer access in nouveau_fbcon_destroy
This commit is contained in:
commit
51b83e1428
9 changed files with 63 additions and 22 deletions
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@ -224,7 +224,7 @@ nouveau_bo_new(struct nouveau_cli *cli, u64 size, int align,
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/* Determine if we can get a cache-coherent map, forcing
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* uncached mapping if we can't.
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*/
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if (mmu->type[drm->ttm.type_host].type & NVIF_MEM_UNCACHED)
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if (!nouveau_drm_use_coherent_gpu_mapping(drm))
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nvbo->force_coherent = true;
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}
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@ -262,7 +262,8 @@ nouveau_bo_new(struct nouveau_cli *cli, u64 size, int align,
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if (cli->device.info.family > NV_DEVICE_INFO_V0_CURIE &&
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(flags & TTM_PL_FLAG_VRAM) && !vmm->page[i].vram)
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continue;
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if ((flags & TTM_PL_FLAG_TT ) && !vmm->page[i].host)
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if ((flags & TTM_PL_FLAG_TT) &&
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(!vmm->page[i].host || vmm->page[i].shift > PAGE_SHIFT))
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continue;
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/* Select this page size if it's the first that supports
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@ -157,8 +157,8 @@ struct nouveau_drm {
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struct nvif_object copy;
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int mtrr;
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int type_vram;
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int type_host;
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int type_ncoh;
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int type_host[2];
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int type_ncoh[2];
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} ttm;
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/* GEM interface support */
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@ -217,6 +217,13 @@ nouveau_drm(struct drm_device *dev)
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return dev->dev_private;
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}
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static inline bool
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nouveau_drm_use_coherent_gpu_mapping(struct nouveau_drm *drm)
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{
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struct nvif_mmu *mmu = &drm->client.mmu;
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return !(mmu->type[drm->ttm.type_host[0]].type & NVIF_MEM_UNCACHED);
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}
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int nouveau_pmops_suspend(struct device *);
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int nouveau_pmops_resume(struct device *);
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bool nouveau_pmops_runtime(void);
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@ -429,7 +429,7 @@ nouveau_fbcon_destroy(struct drm_device *dev, struct nouveau_fbdev *fbcon)
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drm_fb_helper_unregister_fbi(&fbcon->helper);
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drm_fb_helper_fini(&fbcon->helper);
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if (nouveau_fb->nvbo) {
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if (nouveau_fb && nouveau_fb->nvbo) {
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nouveau_vma_del(&nouveau_fb->vma);
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nouveau_bo_unmap(nouveau_fb->nvbo);
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nouveau_bo_unpin(nouveau_fb->nvbo);
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@ -103,10 +103,10 @@ nouveau_mem_host(struct ttm_mem_reg *reg, struct ttm_dma_tt *tt)
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u8 type;
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int ret;
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if (mmu->type[drm->ttm.type_host].type & NVIF_MEM_UNCACHED)
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type = drm->ttm.type_ncoh;
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if (!nouveau_drm_use_coherent_gpu_mapping(drm))
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type = drm->ttm.type_ncoh[!!mem->kind];
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else
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type = drm->ttm.type_host;
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type = drm->ttm.type_host[0];
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if (mem->kind && !(mmu->type[type].type & NVIF_MEM_KIND))
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mem->comp = mem->kind = 0;
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@ -235,6 +235,27 @@ nouveau_ttm_global_release(struct nouveau_drm *drm)
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drm->ttm.mem_global_ref.release = NULL;
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}
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static int
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nouveau_ttm_init_host(struct nouveau_drm *drm, u8 kind)
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{
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struct nvif_mmu *mmu = &drm->client.mmu;
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int typei;
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typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE |
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kind | NVIF_MEM_COHERENT);
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if (typei < 0)
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return -ENOSYS;
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drm->ttm.type_host[!!kind] = typei;
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typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE | kind);
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if (typei < 0)
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return -ENOSYS;
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drm->ttm.type_ncoh[!!kind] = typei;
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return 0;
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}
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int
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nouveau_ttm_init(struct nouveau_drm *drm)
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{
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@ -244,18 +265,16 @@ nouveau_ttm_init(struct nouveau_drm *drm)
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struct drm_device *dev = drm->dev;
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int typei, ret;
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typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE |
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NVIF_MEM_COHERENT);
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if (typei < 0)
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return -ENOSYS;
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ret = nouveau_ttm_init_host(drm, 0);
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if (ret)
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return ret;
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drm->ttm.type_host = typei;
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typei = nvif_mmu_type(mmu, NVIF_MEM_HOST | NVIF_MEM_MAPPABLE);
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if (typei < 0)
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return -ENOSYS;
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drm->ttm.type_ncoh = typei;
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if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
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drm->client.device.info.chipset != 0x50) {
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ret = nouveau_ttm_init_host(drm, NVIF_MEM_KIND);
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if (ret)
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return ret;
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}
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if (drm->client.device.info.platform != NV_DEVICE_INFO_V0_SOC &&
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drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
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@ -2369,7 +2369,7 @@ nv13b_chipset = {
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.imem = gk20a_instmem_new,
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.ltc = gp100_ltc_new,
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.mc = gp10b_mc_new,
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.mmu = gf100_mmu_new,
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.mmu = gp10b_mmu_new,
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.secboot = gp10b_secboot_new,
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.pmu = gm20b_pmu_new,
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.timer = gk20a_timer_new,
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@ -36,6 +36,7 @@ nvbios_dp_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
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if (data) {
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*ver = nvbios_rd08(bios, data + 0x00);
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switch (*ver) {
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case 0x20:
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case 0x21:
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case 0x30:
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case 0x40:
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@ -63,6 +64,7 @@ nvbios_dpout_entry(struct nvkm_bios *bios, u8 idx,
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if (data && idx < *cnt) {
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u16 outp = nvbios_rd16(bios, data + *hdr + idx * *len);
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switch (*ver * !!outp) {
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case 0x20:
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case 0x21:
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case 0x30:
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*hdr = nvbios_rd08(bios, data + 0x04);
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@ -96,12 +98,16 @@ nvbios_dpout_parse(struct nvkm_bios *bios, u8 idx,
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info->type = nvbios_rd16(bios, data + 0x00);
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info->mask = nvbios_rd16(bios, data + 0x02);
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switch (*ver) {
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case 0x20:
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info->mask |= 0x00c0; /* match any link */
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/* fall-through */
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case 0x21:
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case 0x30:
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info->flags = nvbios_rd08(bios, data + 0x05);
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info->script[0] = nvbios_rd16(bios, data + 0x06);
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info->script[1] = nvbios_rd16(bios, data + 0x08);
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info->lnkcmp = nvbios_rd16(bios, data + 0x0a);
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if (*len >= 0x0c)
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info->lnkcmp = nvbios_rd16(bios, data + 0x0a);
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if (*len >= 0x0f) {
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info->script[2] = nvbios_rd16(bios, data + 0x0c);
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info->script[3] = nvbios_rd16(bios, data + 0x0e);
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@ -170,6 +176,7 @@ nvbios_dpcfg_parse(struct nvkm_bios *bios, u16 outp, u8 idx,
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memset(info, 0x00, sizeof(*info));
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if (data) {
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switch (*ver) {
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case 0x20:
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case 0x21:
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info->dc = nvbios_rd08(bios, data + 0x02);
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info->pe = nvbios_rd08(bios, data + 0x03);
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@ -249,7 +249,7 @@ nv50_instobj_acquire(struct nvkm_memory *memory)
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iobj->base.memory.ptrs = &nv50_instobj_fast;
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else
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iobj->base.memory.ptrs = &nv50_instobj_slow;
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refcount_inc(&iobj->maps);
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refcount_set(&iobj->maps, 1);
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}
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mutex_unlock(&imem->subdev.mutex);
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@ -136,6 +136,13 @@ nvkm_pci_init(struct nvkm_subdev *subdev)
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return ret;
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pci->irq = pdev->irq;
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/* Ensure MSI interrupts are armed, for the case where there are
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* already interrupts pending (for whatever reason) at load time.
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*/
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if (pci->msi)
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pci->func->msi_rearm(pci);
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return ret;
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}
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