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PCI: Use cached MSI-X cap while enabling MSI-X
The patch uses the cached MSI-X capability offset in pci_dev instead of reading it from config space when enabling MSI-X interrupts. Signed-off-by: Gavin Shan <shangw@linux.vnet.ibm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
parent
f465136d72
commit
520fe9dc1b
1 changed files with 16 additions and 20 deletions
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@ -598,14 +598,14 @@ static int msi_capability_init(struct pci_dev *dev, int nvec)
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return 0;
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}
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static void __iomem *msix_map_region(struct pci_dev *dev, unsigned pos,
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unsigned nr_entries)
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static void __iomem *msix_map_region(struct pci_dev *dev, unsigned nr_entries)
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{
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resource_size_t phys_addr;
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u32 table_offset;
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u8 bir;
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pci_read_config_dword(dev, msix_table_offset_reg(pos), &table_offset);
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pci_read_config_dword(dev,
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msix_table_offset_reg(dev->msix_cap), &table_offset);
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bir = (u8)(table_offset & PCI_MSIX_FLAGS_BIRMASK);
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table_offset &= ~PCI_MSIX_FLAGS_BIRMASK;
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phys_addr = pci_resource_start(dev, bir) + table_offset;
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@ -613,9 +613,8 @@ static void __iomem *msix_map_region(struct pci_dev *dev, unsigned pos,
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return ioremap_nocache(phys_addr, nr_entries * PCI_MSIX_ENTRY_SIZE);
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}
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static int msix_setup_entries(struct pci_dev *dev, unsigned pos,
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void __iomem *base, struct msix_entry *entries,
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int nvec)
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static int msix_setup_entries(struct pci_dev *dev, void __iomem *base,
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struct msix_entry *entries, int nvec)
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{
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struct msi_desc *entry;
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int i;
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@ -635,7 +634,7 @@ static int msix_setup_entries(struct pci_dev *dev, unsigned pos,
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entry->msi_attrib.is_64 = 1;
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entry->msi_attrib.entry_nr = entries[i].entry;
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entry->msi_attrib.default_irq = dev->irq;
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entry->msi_attrib.pos = pos;
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entry->msi_attrib.pos = dev->msix_cap;
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entry->mask_base = base;
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list_add_tail(&entry->list, &dev->msi_list);
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@ -645,7 +644,7 @@ static int msix_setup_entries(struct pci_dev *dev, unsigned pos,
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}
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static void msix_program_entries(struct pci_dev *dev,
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struct msix_entry *entries)
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struct msix_entry *entries)
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{
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struct msi_desc *entry;
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int i = 0;
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@ -675,23 +674,22 @@ static void msix_program_entries(struct pci_dev *dev,
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static int msix_capability_init(struct pci_dev *dev,
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struct msix_entry *entries, int nvec)
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{
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int pos, ret;
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int ret;
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u16 control;
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void __iomem *base;
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pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
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pci_read_config_word(dev, pos + PCI_MSIX_FLAGS, &control);
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pci_read_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, &control);
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/* Ensure MSI-X is disabled while it is set up */
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control &= ~PCI_MSIX_FLAGS_ENABLE;
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pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
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pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control);
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/* Request & Map MSI-X table region */
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base = msix_map_region(dev, pos, multi_msix_capable(control));
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base = msix_map_region(dev, multi_msix_capable(control));
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if (!base)
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return -ENOMEM;
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ret = msix_setup_entries(dev, pos, base, entries, nvec);
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ret = msix_setup_entries(dev, base, entries, nvec);
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if (ret)
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return ret;
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@ -705,7 +703,7 @@ static int msix_capability_init(struct pci_dev *dev,
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* interrupts coming in before they're fully set up.
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*/
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control |= PCI_MSIX_FLAGS_MASKALL | PCI_MSIX_FLAGS_ENABLE;
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pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
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pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control);
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msix_program_entries(dev, entries);
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@ -720,7 +718,7 @@ static int msix_capability_init(struct pci_dev *dev,
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dev->msix_enabled = 1;
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control &= ~PCI_MSIX_FLAGS_MASKALL;
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pci_write_config_word(dev, pos + PCI_MSIX_FLAGS, control);
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pci_write_config_word(dev, dev->msix_cap + PCI_MSIX_FLAGS, control);
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return 0;
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@ -906,14 +904,12 @@ EXPORT_SYMBOL(pci_disable_msi);
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*/
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int pci_msix_table_size(struct pci_dev *dev)
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{
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int pos;
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u16 control;
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pos = pci_find_capability(dev, PCI_CAP_ID_MSIX);
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if (!pos)
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if (!dev->msix_cap)
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return 0;
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pci_read_config_word(dev, msi_control_reg(pos), &control);
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pci_read_config_word(dev, msi_control_reg(dev->msix_cap), &control);
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return multi_msix_capable(control);
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}
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