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arm64: dts: renesas: rzg2ul-smarc: Include SoM DTSI into board DTS
Move including the rzg2ul-smarc-som.dtsi from the carrier board rzg2ul-smarc.dtsi to the actual RZ/G2UL SMARC EVK board dts r9a07g043u11-smarc.dts. Also move the SW_SW0_DEV_SEL and SW_ET0_EN_N macros to board dts as they are used by SoM and carrier board DTS/I. This is in preparation of re-using the SoM and carrier board DTSIs for RZ/Five SMARC EVK. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220915165256.352843-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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2 changed files with 12 additions and 11 deletions
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@ -6,7 +6,19 @@
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*/
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/dts-v1/;
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/*
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* DIP-Switch SW1 setting
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* 1 : High; 0: Low
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* SW1-2 : SW_SD0_DEV_SEL (0: uSD; 1: eMMC)
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* SW1-3 : SW_ET0_EN_N (0: ETHER0; 1: CAN0, CAN1, SSI1, RSPI1)
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* Please change below macros according to SW1 setting on the SoM
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*/
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#define SW_SW0_DEV_SEL 1
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#define SW_ET0_EN_N 1
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#include "r9a07g043.dtsi"
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#include "rzg2ul-smarc-som.dtsi"
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#include "rzg2ul-smarc.dtsi"
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/ {
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@ -5,17 +5,6 @@
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* Copyright (C) 2022 Renesas Electronics Corp.
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*/
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/*
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* DIP-Switch SW1 setting
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* 1 : High; 0: Low
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* SW1-2 : SW_SD0_DEV_SEL (0: uSD; 1: eMMC)
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* SW1-3 : SW_ET0_EN_N (0: ETHER0; 1: CAN0, CAN1, SSI1, RSPI1)
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* Please change below macros according to SW1 setting
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*/
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#define SW_SW0_DEV_SEL 1
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#define SW_ET0_EN_N 1
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#include "rzg2ul-smarc-som.dtsi"
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#include "rzg2ul-smarc-pinfunction.dtsi"
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#include "rz-smarc-common.dtsi"
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