arm64: dts: qcom: sc7280: drop PCIe PHY clock index

The QMP PCIe PHY provides a single clock so drop the redundant clock
index.

Signed-off-by: Johan Hovold <johan+linaro@kernel.org>
Fixes: bd7d507935 ("arm64: dts: qcom: sc7280: Add pcie clock support")
Fixes: 92e0ee9f83 ("arm64: dts: qcom: sc7280: Add PCIe and PHY related  nodes")
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220705114032.22787-2-johan+linaro@kernel.org
This commit is contained in:
Johan Hovold 2022-07-05 13:40:19 +02:00 committed by Bjorn Andersson
parent 21857088fa
commit 531c738fb3

View file

@ -818,7 +818,7 @@ gcc: clock-controller@100000 {
reg = <0 0x00100000 0 0x1f0000>;
clocks = <&rpmhcc RPMH_CXO_CLK>,
<&rpmhcc RPMH_CXO_CLK_A>, <&sleep_clk>,
<0>, <&pcie1_lane 0>,
<0>, <&pcie1_lane>,
<0>, <0>, <0>, <0>;
clock-names = "bi_tcxo", "bi_tcxo_ao", "sleep_clk",
"pcie_0_pipe_clk", "pcie_1_pipe_clk",
@ -2110,7 +2110,7 @@ pcie1_lane: phy@1c0e200 {
clock-names = "pipe0";
#phy-cells = <0>;
#clock-cells = <1>;
#clock-cells = <0>;
clock-output-names = "pcie_1_pipe_clk";
};
};