drm/omap: omap_display_timings: Use display_flags for double_pixel mode

In preparation to move the stack to use the generic videmode struct for
display timing information use display_flags for double_pixel mode.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
This commit is contained in:
Peter Ujfalusi 2016-09-22 14:06:59 +03:00 committed by Tomi Valkeinen
parent 3fa3ab4a88
commit 531efb380c
7 changed files with 11 additions and 13 deletions

View file

@ -3270,8 +3270,9 @@ void dispc_mgr_set_timings(enum omap_channel channel,
t.vactive /= 2;
if (dispc.feat->supports_double_pixel)
REG_FLD_MOD(DISPC_CONTROL, t.double_pixel ? 1 : 0,
19, 17);
REG_FLD_MOD(DISPC_CONTROL,
!!(t.flags & DISPLAY_FLAGS_DOUBLECLK),
19, 17);
}
dispc_mgr_set_size(channel, t.hactive, t.vactive);
@ -4206,7 +4207,6 @@ static const struct dispc_errata_i734_data {
.vsync_len = 1, .vfront_porch = 1, .vback_porch = 1,
.data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
.sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE,
.double_pixel = false,
.flags = DISPLAY_FLAGS_HSYNC_LOW | DISPLAY_FLAGS_VSYNC_LOW |
DISPLAY_FLAGS_DE_HIGH,

View file

@ -175,7 +175,7 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
p->vactive);
pc = p->pixelclock;
if (p->double_pixel)
if (p->flags & DISPLAY_FLAGS_DOUBLECLK)
pc *= 2;
/* DSS_HDMI_TCLK is bitclk / 10 */

View file

@ -187,7 +187,7 @@ static int hdmi_power_on_full(struct omap_dss_device *dssdev)
p->vactive);
pc = p->pixelclock;
if (p->double_pixel)
if (p->flags & DISPLAY_FLAGS_DOUBLECLK)
pc *= 2;
/* DSS_HDMI_TCLK is bitclk / 10 */

View file

@ -315,7 +315,7 @@ static void hdmi_core_init(struct hdmi_core_vid_config *video_cfg,
video_cfg->v_fc_config.timings.vback_porch /= 2;
}
if (cfg->timings.double_pixel) {
if (cfg->timings.flags & DISPLAY_FLAGS_DOUBLECLK) {
video_cfg->v_fc_config.timings.hactive *= 2;
video_cfg->hblank *= 2;
video_cfg->v_fc_config.timings.hfront_porch *= 2;
@ -382,7 +382,7 @@ static void hdmi_core_video_config(struct hdmi_core_data *core,
REG_FLD_MOD(base, HDMI_CORE_FC_INVIDCONF,
cfg->v_fc_config.hdmi_dvi_mode, 3, 3);
if (ovt->double_pixel)
if (ovt->flags & DISPLAY_FLAGS_DOUBLECLK)
REG_FLD_MOD(base, HDMI_CORE_FC_PRCONF, 2, 7, 4);
else
REG_FLD_MOD(base, HDMI_CORE_FC_PRCONF, 1, 7, 4);

View file

@ -208,7 +208,6 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
timings->vfront_porch = param->timings.vfront_porch;
timings->vsync_len = param->timings.vsync_len;
timings->double_pixel = param->timings.double_pixel;
timings->flags = param->timings.flags;
if (param->timings.flags & DISPLAY_FLAGS_INTERLACED) {
@ -218,7 +217,7 @@ void hdmi_wp_init_vid_fmt_timings(struct hdmi_video_format *video_fmt,
timings->vsync_len /= 2;
}
if (param->timings.double_pixel) {
if (param->timings.flags & DISPLAY_FLAGS_DOUBLECLK) {
video_fmt->x_res *= 2;
timings->hfront_porch *= 2;
timings->hsync_len *= 2;

View file

@ -324,8 +324,6 @@ struct omap_video_timings {
/* Pixel clock edges to drive HSYNC and VSYNC signals */
enum omap_dss_signal_edge sync_pclk_edge;
bool double_pixel;
enum display_flags flags;
};

View file

@ -62,7 +62,7 @@ void copy_timings_omap_to_drm(struct drm_display_mode *mode,
if (timings->flags & DISPLAY_FLAGS_INTERLACED)
mode->flags |= DRM_MODE_FLAG_INTERLACE;
if (timings->double_pixel)
if (timings->flags & DISPLAY_FLAGS_DOUBLECLK)
mode->flags |= DRM_MODE_FLAG_DBLCLK;
if (timings->flags & DISPLAY_FLAGS_HSYNC_HIGH)
@ -94,7 +94,8 @@ void copy_timings_drm_to_omap(struct omap_video_timings *timings,
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
timings->flags |= DISPLAY_FLAGS_INTERLACED;
timings->double_pixel = !!(mode->flags & DRM_MODE_FLAG_DBLCLK);
if (mode->flags & DRM_MODE_FLAG_DBLCLK)
timings->flags |= DISPLAY_FLAGS_DOUBLECLK;
if (mode->flags & DRM_MODE_FLAG_PHSYNC)
timings->flags |= DISPLAY_FLAGS_HSYNC_HIGH;