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arm64: dts: qcom: sc8280xp: add resets for soundwire controllers

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Soundwire controllers on sc8280xp needs an explicit reset, add
support for this.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230608125315.11454-6-srinivas.kandagatla@linaro.org
This commit is contained in:
Srinivas Kandagatla 2023-06-08 13:53:14 +01:00 committed by Bjorn Andersson
parent 0832b1c9d0
commit 532bbadcb5
1 changed files with 21 additions and 0 deletions
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21
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
View file

@ -7,6 +7,7 @@
#include <dt-bindings/clock/qcom,dispcc-sc8280xp.h>
#include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/clock/qcom,sc8280xp-lpasscc.h>
#include <dt-bindings/interconnect/qcom,osm-l3.h>
#include <dt-bindings/interconnect/qcom,sc8280xp.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@ -2551,6 +2552,8 @@ swr1: soundwire-controller@3210000 {
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&rxmacro>;
clock-names = "iface";
resets = <&lpass_audiocc LPASS_AUDIO_SWR_RX_CGCR>;
reset-names = "swr_audio_cgcr";
label = "RX";
qcom,din-ports = <0>;
@ -2625,6 +2628,8 @@ swr0: soundwire-controller@3250000 {
interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&wsamacro>;
clock-names = "iface";
resets = <&lpass_audiocc LPASS_AUDIO_SWR_WSA_CGCR>;
reset-names = "swr_audio_cgcr";
label = "WSA";
qcom,din-ports = <2>;
@ -2647,6 +2652,13 @@ swr0: soundwire-controller@3250000 {
status = "disabled";
};
lpass_audiocc: clock-controller@32a9000 {
compatible = "qcom,sc8280xp-lpassaudiocc";
reg = <0 0x032a9000 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};
swr2: soundwire-controller@3330000 {
compatible = "qcom,soundwire-v1.6.0";
reg = <0 0x03330000 0 0x2000>;
@ -2656,6 +2668,8 @@ swr2: soundwire-controller@3330000 {
clocks = <&txmacro>;
clock-names = "iface";
resets = <&lpasscc LPASS_AUDIO_SWR_TX_CGCR>;
reset-names = "swr_audio_cgcr";
label = "TX";
#sound-dai-cells = <1>;
#address-cells = <2>;
@ -2845,6 +2859,13 @@ data-pins {
};
};
lpasscc: clock-controller@33e0000 {
compatible = "qcom,sc8280xp-lpasscc";
reg = <0 0x033e0000 0 0x12000>;
#clock-cells = <1>;
#reset-cells = <1>;
};
sdc2: mmc@8804000 {
compatible = "qcom,sc8280xp-sdhci", "qcom,sdhci-msm-v5";
reg = <0 0x08804000 0 0x1000>;