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- Add the respective UP last level cache mask accessors in order not to
cause segfaults when lscpu accesses their representation in sysfs - Fix for a race in the alternatives batch patching machinery when kprobes are set -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmM5ZDkACgkQEsHwGGHe VUrkaA//dXhnPu2AM9x/v7JMZw0BO2peKMNCmO7b6z4+xIXlxNGNYeO766ZqpjSd eFJj5Hv9ESOZw4UG5cvPA1Vj14nSa6/03Lo9JBFthl2KLOZEgVrD+GNQEJMqxPi/ 9s1+764NXYi8iILHj7N4epQmz+oIbCUlnHLWZRkmG5ys40cPPI/d5li/rKBK8yIQ W89f+WgbqCmpn9Ha8PFYy5uuLxQJnN/McDVZyW2d4MSxJ/FukRl4x1agrfnJq1fb xz9Y/ZpVRPQCc4fJbQcTTffyFyg42AAqC0O0jJ5ZsOJDjZoQS7WvkcKYO33FiwKv /wo61B+7SxbNMcZYhQGP8BxaBeSPlXmMKaifW+xZDS6RN4zfCq/M1+ziVB45GdUq S5hN699vhImciXM5t18wPw6mrpoBBkQYBv+xKkC9ykUw2vxEZ32DeFzwxrybdcGC hWKZJAVTQpvzr1FlrUAbBtQnhUTxSAB6EAdTtIuHQ+ts+OcraR8JNe59GCsEdCVI as+mfqMKB8lwoSyDwomkeMcx5yL9XYy+STLPsPTHLrYFjqwTBOZgWRGrVZzt0EBo 0z12tqxpaFc7RI48Vi0qifkeX2Fi63HSBI/Ba+i11a2jM6NT2d2EcO26rDpO6R2S 6K0N7cD3o0wO+QK2hwxBgGnX8e2aRUE8tjYmW40aclfxl4nh/08= =MiiB -----END PGP SIGNATURE----- Merge tag 'x86_urgent_for_v6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Borislav Petkov: - Add the respective UP last level cache mask accessors in order not to cause segfaults when lscpu accesses their representation in sysfs - Fix for a race in the alternatives batch patching machinery when kprobes are set * tag 'x86_urgent_for_v6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/cacheinfo: Add a cpu_llc_shared_mask() UP variant x86/alternative: Fix race in try_get_desc()
This commit is contained in:
commit
534b0abc62
2 changed files with 38 additions and 32 deletions
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@ -21,16 +21,6 @@ DECLARE_PER_CPU_READ_MOSTLY(u16, cpu_llc_id);
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DECLARE_PER_CPU_READ_MOSTLY(u16, cpu_l2c_id);
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DECLARE_PER_CPU_READ_MOSTLY(int, cpu_number);
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static inline struct cpumask *cpu_llc_shared_mask(int cpu)
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{
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return per_cpu(cpu_llc_shared_map, cpu);
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}
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static inline struct cpumask *cpu_l2c_shared_mask(int cpu)
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{
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return per_cpu(cpu_l2c_shared_map, cpu);
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}
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DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_cpu_to_apicid);
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DECLARE_EARLY_PER_CPU_READ_MOSTLY(u32, x86_cpu_to_acpiid);
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DECLARE_EARLY_PER_CPU_READ_MOSTLY(u16, x86_bios_cpu_apicid);
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@ -172,6 +162,16 @@ extern int safe_smp_processor_id(void);
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# define safe_smp_processor_id() smp_processor_id()
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#endif
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static inline struct cpumask *cpu_llc_shared_mask(int cpu)
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{
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return per_cpu(cpu_llc_shared_map, cpu);
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}
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static inline struct cpumask *cpu_l2c_shared_mask(int cpu)
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{
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return per_cpu(cpu_l2c_shared_map, cpu);
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}
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#else /* !CONFIG_SMP */
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#define wbinvd_on_cpu(cpu) wbinvd()
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static inline int wbinvd_on_all_cpus(void)
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@ -179,6 +179,11 @@ static inline int wbinvd_on_all_cpus(void)
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wbinvd();
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return 0;
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}
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static inline struct cpumask *cpu_llc_shared_mask(int cpu)
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{
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return (struct cpumask *)cpumask_of(0);
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}
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#endif /* CONFIG_SMP */
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extern unsigned disabled_cpus;
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@ -1319,22 +1319,23 @@ struct bp_patching_desc {
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atomic_t refs;
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};
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static struct bp_patching_desc *bp_desc;
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static struct bp_patching_desc bp_desc;
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static __always_inline
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struct bp_patching_desc *try_get_desc(struct bp_patching_desc **descp)
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struct bp_patching_desc *try_get_desc(void)
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{
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/* rcu_dereference */
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struct bp_patching_desc *desc = __READ_ONCE(*descp);
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struct bp_patching_desc *desc = &bp_desc;
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if (!desc || !arch_atomic_inc_not_zero(&desc->refs))
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if (!arch_atomic_inc_not_zero(&desc->refs))
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return NULL;
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return desc;
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}
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static __always_inline void put_desc(struct bp_patching_desc *desc)
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static __always_inline void put_desc(void)
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{
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struct bp_patching_desc *desc = &bp_desc;
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smp_mb__before_atomic();
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arch_atomic_dec(&desc->refs);
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}
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@ -1367,15 +1368,15 @@ noinstr int poke_int3_handler(struct pt_regs *regs)
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/*
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* Having observed our INT3 instruction, we now must observe
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* bp_desc:
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* bp_desc with non-zero refcount:
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*
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* bp_desc = desc INT3
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* bp_desc.refs = 1 INT3
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* WMB RMB
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* write INT3 if (desc)
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* write INT3 if (bp_desc.refs != 0)
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*/
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smp_rmb();
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desc = try_get_desc(&bp_desc);
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desc = try_get_desc();
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if (!desc)
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return 0;
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@ -1429,7 +1430,7 @@ noinstr int poke_int3_handler(struct pt_regs *regs)
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ret = 1;
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out_put:
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put_desc(desc);
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put_desc();
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return ret;
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}
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@ -1460,18 +1461,20 @@ static int tp_vec_nr;
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*/
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static void text_poke_bp_batch(struct text_poke_loc *tp, unsigned int nr_entries)
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{
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struct bp_patching_desc desc = {
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.vec = tp,
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.nr_entries = nr_entries,
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.refs = ATOMIC_INIT(1),
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};
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unsigned char int3 = INT3_INSN_OPCODE;
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unsigned int i;
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int do_sync;
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lockdep_assert_held(&text_mutex);
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smp_store_release(&bp_desc, &desc); /* rcu_assign_pointer */
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bp_desc.vec = tp;
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bp_desc.nr_entries = nr_entries;
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/*
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* Corresponds to the implicit memory barrier in try_get_desc() to
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* ensure reading a non-zero refcount provides up to date bp_desc data.
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*/
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atomic_set_release(&bp_desc.refs, 1);
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/*
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* Corresponding read barrier in int3 notifier for making sure the
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@ -1559,12 +1562,10 @@ static void text_poke_bp_batch(struct text_poke_loc *tp, unsigned int nr_entries
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text_poke_sync();
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/*
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* Remove and synchronize_rcu(), except we have a very primitive
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* refcount based completion.
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* Remove and wait for refs to be zero.
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*/
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WRITE_ONCE(bp_desc, NULL); /* RCU_INIT_POINTER */
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if (!atomic_dec_and_test(&desc.refs))
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atomic_cond_read_acquire(&desc.refs, !VAL);
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if (!atomic_dec_and_test(&bp_desc.refs))
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atomic_cond_read_acquire(&bp_desc.refs, !VAL);
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}
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static void text_poke_loc_init(struct text_poke_loc *tp, void *addr,
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