drm/tegra: sor: Reset during initialization

As there isn't a way for the firmware on the Nyan Chromebooks to hand
over the display to the kernel, and the kernel isn't redoing the whole
configuration at present.

With this patch, the SOR is brought to a known state and we get correct
display on every boot.

Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Tomeu Vizoso 2015-03-30 10:33:03 +02:00 committed by Thierry Reding
parent bdf765071a
commit 535a65db48

View file

@ -1512,12 +1512,30 @@ static int tegra_sor_init(struct host1x_client *client)
}
}
/*
* XXX: Remove this reset once proper hand-over from firmware to
* kernel is possible.
*/
err = reset_control_assert(sor->rst);
if (err < 0) {
dev_err(sor->dev, "failed to assert SOR reset: %d\n", err);
return err;
}
err = clk_prepare_enable(sor->clk);
if (err < 0) {
dev_err(sor->dev, "failed to enable clock: %d\n", err);
return err;
}
usleep_range(1000, 3000);
err = reset_control_deassert(sor->rst);
if (err < 0) {
dev_err(sor->dev, "failed to deassert SOR reset: %d\n", err);
return err;
}
err = clk_prepare_enable(sor->clk_safe);
if (err < 0)
return err;