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drm/tegra: sor: Reset during initialization
As there isn't a way for the firmware on the Nyan Chromebooks to hand over the display to the kernel, and the kernel isn't redoing the whole configuration at present. With this patch, the SOR is brought to a known state and we get correct display on every boot. Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
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@ -1512,12 +1512,30 @@ static int tegra_sor_init(struct host1x_client *client)
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}
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}
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/*
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* XXX: Remove this reset once proper hand-over from firmware to
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* kernel is possible.
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*/
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err = reset_control_assert(sor->rst);
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if (err < 0) {
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dev_err(sor->dev, "failed to assert SOR reset: %d\n", err);
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return err;
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}
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err = clk_prepare_enable(sor->clk);
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if (err < 0) {
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dev_err(sor->dev, "failed to enable clock: %d\n", err);
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return err;
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}
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usleep_range(1000, 3000);
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err = reset_control_deassert(sor->rst);
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if (err < 0) {
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dev_err(sor->dev, "failed to deassert SOR reset: %d\n", err);
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return err;
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}
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err = clk_prepare_enable(sor->clk_safe);
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if (err < 0)
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return err;
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